📄 timeset.fit.rpt
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+---------------------------------------+---------+
; Name ; Fan-Out ;
+---------------------------------------+---------+
; disp_drive[2]~reg0 ; 24 ;
; disp_drive[1]~reg0 ; 24 ;
; disp_drive[0]~reg0 ; 24 ;
; lpm_counter:minute_set0_rtl_3|dffs[3] ; 5 ;
; lpm_counter:hour_set0_rtl_1|dffs[3] ; 5 ;
; lpm_counter:second_set0_rtl_5|dffs[3] ; 5 ;
; lpm_counter:minute_set0_rtl_3|dffs[1] ; 5 ;
; lpm_counter:hour_set0_rtl_1|dffs[1] ; 5 ;
; lpm_counter:second_set0_rtl_5|dffs[1] ; 5 ;
; lpm_counter:minute_set0_rtl_3|dffs[0] ; 5 ;
; lpm_counter:hour_set0_rtl_1|dffs[0] ; 5 ;
; lpm_counter:second_set0_rtl_5|dffs[0] ; 5 ;
; lpm_counter:minute_set0_rtl_3|dffs[2] ; 4 ;
; lpm_counter:hour_set0_rtl_1|dffs[2] ; 4 ;
; lpm_counter:second_set0_rtl_5|dffs[2] ; 4 ;
; lpm_counter:second_set1_rtl_4|dffs[2] ; 4 ;
; lpm_counter:minute_set1_rtl_2|dffs[2] ; 4 ;
; lpm_counter:second_set1_rtl_4|dffs[1] ; 4 ;
; lpm_counter:minute_set1_rtl_2|dffs[1] ; 4 ;
; lpm_counter:second_set1_rtl_4|dffs[0] ; 4 ;
; lpm_counter:minute_set1_rtl_2|dffs[0] ; 4 ;
; TimeSet_EN ; 3 ;
; lpm_counter:hour_set1_rtl_0|dffs[1] ; 3 ;
; lpm_counter:hour_set1_rtl_0|dffs[0] ; 3 ;
; ~GND~3 ; 1 ;
; ~GND~2 ; 1 ;
; ~GND~1 ; 1 ;
; ~GND~0 ; 1 ;
+---------------------------------------+---------+
+------------------------------------------------+
; Interconnect Usage Summary ;
+----------------------------+-------------------+
; Interconnect Resource Type ; Usage ;
+----------------------------+-------------------+
; Output enables ; 0 / 6 ( 0 % ) ;
; PIA buffers ; 27 / 144 ( 18 % ) ;
+----------------------------+-------------------+
+----------------------------------------------------------------------+
; LAB Macrocells ;
+----------------------------------------+-----------------------------+
; Number of Macrocells (Average = 6.75) ; Number of LABs (Total = 2) ;
+----------------------------------------+-----------------------------+
; 0 ; 2 ;
; 1 ; 0 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 0 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 0 ;
; 8 ; 0 ;
; 9 ; 0 ;
; 10 ; 0 ;
; 11 ; 0 ;
; 12 ; 0 ;
; 13 ; 1 ;
; 14 ; 1 ;
+----------------------------------------+-----------------------------+
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Logic Cell Interconnection ;
+-----+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LAB ; Logic Cell ; Input ; Output ;
+-----+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; A ; LC4 ; ; second_set1[3] ;
; A ; LC6 ; ; minute_set1[3] ;
; A ; LC7 ; ; hour_set1[2] ;
; A ; LC9 ; ; hour_set1[3] ;
; A ; LC10 ; SW2, lpm_counter:second_set0_rtl_5|dffs[2], lpm_counter:second_set0_rtl_5|dffs[1], lpm_counter:second_set0_rtl_5|dffs[0], lpm_counter:second_set0_rtl_5|dffs[3], disp_drive[2]~reg0, disp_drive[1]~reg0, disp_drive[0]~reg0 ; lpm_counter:second_set0_rtl_5|dffs[0], lpm_counter:second_set0_rtl_5|dffs[1], lpm_counter:second_set0_rtl_5|dffs[2], lpm_counter:second_set0_rtl_5|dffs[3], second_set0[3] ;
; A ; LC14 ; SW2, lpm_counter:second_set0_rtl_5|dffs[3], lpm_counter:second_set0_rtl_5|dffs[1], lpm_counter:second_set0_rtl_5|dffs[0], lpm_counter:second_set0_rtl_5|dffs[2], disp_drive[2]~reg0, disp_drive[1]~reg0, disp_drive[0]~reg0 ; lpm_counter:second_set0_rtl_5|dffs[0], lpm_counter:second_set0_rtl_5|dffs[2], second_set0[2], lpm_counter:second_set0_rtl_5|dffs[3] ;
; A ; LC13 ; SW2, lpm_counter:second_set0_rtl_5|dffs[3], lpm_counter:second_set0_rtl_5|dffs[1], lpm_counter:second_set0_rtl_5|dffs[0], disp_drive[2]~reg0, disp_drive[1]~reg0, disp_drive[0]~reg0 ; lpm_counter:second_set0_rtl_5|dffs[0], lpm_counter:second_set0_rtl_5|dffs[1], second_set0[1], lpm_counter:second_set0_rtl_5|dffs[2], lpm_counter:second_set0_rtl_5|dffs[3] ;
; A ; LC12 ; SW2, lpm_counter:hour_set1_rtl_0|dffs[1], lpm_counter:hour_set1_rtl_0|dffs[0], disp_drive[2]~reg0, disp_drive[1]~reg0, disp_drive[0]~reg0 ; lpm_counter:hour_set1_rtl_0|dffs[0], lpm_counter:hour_set1_rtl_0|dffs[1], hour_set1[1] ;
; A ; LC1 ; SW1, disp_drive[1]~reg0, disp_drive[2]~reg0, disp_drive[0]~reg0, TimeSet_EN ; disp_drive[0]~reg0, disp_drive[0], disp_drive[1]~reg0, disp_drive[2]~reg0, lpm_counter:hour_set1_rtl_0|dffs[0], lpm_counter:minute_set1_rtl_2|dffs[0], lpm_counter:second_set1_rtl_4|dffs[0], lpm_counter:second_set0_rtl_5|dffs[0], lpm_counter:hour_set0_rtl_1|dffs[0], lpm_counter:minute_set0_rtl_3|dffs[0], lpm_counter:hour_set1_rtl_0|dffs[1], lpm_counter:minute_set1_rtl_2|dffs[1], lpm_counter:second_set1_rtl_4|dffs[1], lpm_counter:second_set0_rtl_5|dffs[1], lpm_counter:hour_set0_rtl_1|dffs[1], lpm_counter:minute_set0_rtl_3|dffs[1], lpm_counter:minute_set1_rtl_2|dffs[2], lpm_counter:second_set1_rtl_4|dffs[2], lpm_counter:second_set0_rtl_5|dffs[2], lpm_counter:hour_set0_rtl_1|dffs[2], lpm_counter:minute_set0_rtl_3|dffs[2], lpm_counter:second_set0_rtl_5|dffs[3], lpm_counter:hour_set0_rtl_1|dffs[3], lpm_counter:minute_set0_rtl_3|dffs[3] ;
; A ; LC2 ; SW1, disp_drive[2]~reg0, disp_drive[1]~reg0, disp_drive[0]~reg0, TimeSet_EN ; disp_drive[0]~reg0, disp_drive[1]~reg0, disp_drive[1], disp_drive[2]~reg0, lpm_counter:hour_set1_rtl_0|dffs[0], lpm_counter:minute_set1_rtl_2|dffs[0], lpm_counter:second_set1_rtl_4|dffs[0], lpm_counter:second_set0_rtl_5|dffs[0], lpm_counter:hour_set0_rtl_1|dffs[0], lpm_counter:minute_set0_rtl_3|dffs[0], lpm_counter:hour_set1_rtl_0|dffs[1], lpm_counter:minute_set1_rtl_2|dffs[1], lpm_counter:second_set1_rtl_4|dffs[1], lpm_counter:second_set0_rtl_5|dffs[1], lpm_counter:hour_set0_rtl_1|dffs[1], lpm_counter:minute_set0_rtl_3|dffs[1], lpm_counter:minute_set1_rtl_2|dffs[2], lpm_counter:second_set1_rtl_4|dffs[2], lpm_counter:second_set0_rtl_5|dffs[2], lpm_counter:hour_set0_rtl_1|dffs[2], lpm_counter:minute_set0_rtl_3|dffs[2], lpm_counter:second_set0_rtl_5|dffs[3], lpm_counter:hour_set0_rtl_1|dffs[3], lpm_counter:minute_set0_rtl_3|dffs[3] ;
; A ; LC3 ; SW1, disp_drive[1]~reg0, disp_drive[2]~reg0, disp_drive[0]~reg0, TimeSet_EN ; disp_drive[0]~reg0, disp_drive[1]~reg0, disp_drive[2]~reg0, disp_drive[2], lpm_counter:hour_set1_rtl_0|dffs[0], lpm_counter:minute_set1_rtl_2|dffs[0], lpm_counter:second_set1_rtl_4|dffs[0], lpm_counter:second_set0_rtl_5|dffs[0], lpm_counter:hour_set0_rtl_1|dffs[0], lpm_counter:minute_set0_rtl_3|dffs[0], lpm_counter:hour_set1_rtl_0|dffs[1], lpm_counter:minute_set1_rtl_2|dffs[1], lpm_counter:second_set1_rtl_4|dffs[1], lpm_counter:second_set0_rtl_5|dffs[1], lpm_counter:hour_set0_rtl_1|dffs[1], lpm_counter:minute_set0_rtl_3|dffs[1], lpm_counter:minute_set1_rtl_2|dffs[2], lpm_counter:second_set1_rtl_4|dffs[2], lpm_counter:second_set0_rtl_5|dffs[2], lpm_counter:hour_set0_rtl_1|dffs[2], lpm_counter:minute_set0_rtl_3|dffs[2], lpm_counter:second_set0_rtl_5|dffs[3], lpm_counter:hour_set0_rtl_1|dffs[3], lpm_counter:minute_set0_rtl_3|dffs[3] ;
; A ; LC5 ; SW2, lpm_counter:hour_set1_rtl_0|dffs[1], lpm_counter:hour_set1_rtl_0|dffs[0], disp_drive[2]~reg0, disp_drive[1]~reg0, disp_drive[0]~reg0 ; lpm_counter:hour_set1_rtl_0|dffs[0], hour_set1[0], lpm_counter:hour_set1_rtl_0|dffs[1] ;
; A ; LC11 ; SW2, lpm_counter:second_set0_rtl_5|dffs[0], lpm_counter:second_set0_rtl_5|dffs[3], lpm_counter:second_set0_rtl_5|dffs[2], lpm_counter:second_set0_rtl_5|dffs[1], disp_drive[2]~reg0, disp_drive[1]~reg0, disp_drive[0]~reg0 ; lpm_counter:second_set0_rtl_5|dffs[0], second_set0[0], lpm_counter:second_set0_rtl_5|dffs[1], lpm_counter:second_set0_rtl_5|dffs[2], lpm_counter:second_set0_rtl_5|dffs[3] ;
; B ; LC19 ; SW2, lpm_counter:minute_set0_rtl_3|dffs[2], lpm_counter:minute_set0_rtl_3|dffs[1], lpm_counter:minute_set0_rtl_3|dffs[0], lpm_counter:minute_set0_rtl_3|dffs[3], disp_drive[1]~reg0, disp_drive[2]~reg0, disp_drive[0]~reg0 ; lpm_counter:minute_set0_rtl_3|dffs[0], lpm_counter:minute_set0_rtl_3|dffs[1], lpm_counter:minute_set0_rtl_3|dffs[2], lpm_counter:minute_set0_rtl_3|dffs[3], minute_set0[3] ;
; B ; LC31 ; SW2, lpm_counter:hour_set0_rtl_1|dffs[2], lpm_counter:hour_set0_rtl_1|dffs[1], lpm_counter:hour_set0_rtl_1|dffs[0], lpm_counter:hour_set0_rtl_1|dffs[3], disp_drive[1]~reg0, disp_drive[2]~reg0, disp_drive[0]~reg0 ; lpm_counter:hour_set0_rtl_1|dffs[0], lpm_counter:hour_set0_rtl_1|dffs[1], lpm_counter:hour_set0_rtl_1|dffs[2], lpm_counter:hour_set0_rtl_1|dffs[3], hour_set0[3] ;
; B ; LC17 ; SW2, lpm_counter:minute_set1_rtl_2|dffs[2], lpm_counter:minute_set1_rtl_2|dffs[1], lpm_counter:minute_set1_rtl_2|dffs[0], disp_drive[2]~reg0, disp_drive[1]~reg0, disp_drive[0]~reg0 ; lpm_counter:minute_set1_rtl_2|dffs[0], minute_set1[0], lpm_counter:minute_set1_rtl_2|dffs[1], lpm_counter:minute_set1_rtl_2|dffs[2] ;
; B ; LC23 ; SW2, lpm_counter:minute_set0_rtl_3|dffs[3], lpm_counter:minute_set0_rtl_3|dffs[1], lpm_counter:minute_set0_rtl_3|dffs[0], lpm_counter:minute_set0_rtl_3|dffs[2], disp_drive[1]~reg0, disp_drive[2]~reg0, disp_drive[0]~reg0 ; lpm_counter:minute_set0_rtl_3|dffs[0], lpm_counter:minute_set0_rtl_3|dffs[2], minute_set0[2], lpm_counter:minute_set0_rtl_3|dffs[3] ;
; B ; LC25 ; SW2, lpm_counter:hour_set0_rtl_1|dffs[3], lpm_counter:hour_set0_rtl_1|dffs[1], lpm_counter:hour_set0_rtl_1|dffs[0], lpm_counter:hour_set0_rtl_1|dffs[2], disp_drive[1]~reg0, disp_drive[2]~reg0, disp_drive[0]~reg0 ; lpm_counter:hour_set0_rtl_1|dffs[0], lpm_counter:hour_set0_rtl_1|dffs[2], hour_set0[2], lpm_counter:hour_set0_rtl_1|dffs[3] ;
; B ; LC18 ; SW2, lpm_counter:second_set1_rtl_4|dffs[2], lpm_counter:second_set1_rtl_4|dffs[1], lpm_counter:second_set1_rtl_4|dffs[0], disp_drive[2]~reg0, disp_drive[1]~reg0, disp_drive[0]~reg0 ; lpm_counter:second_set1_rtl_4|dffs[0], second_set1[0], lpm_counter:second_set1_rtl_4|dffs[1], lpm_counter:second_set1_rtl_4|dffs[2] ;
; B ; LC26 ; SW2, lpm_counter:second_set1_rtl_4|dffs[1], lpm_counter:second_set1_rtl_4|dffs[0], lpm_counter:second_set1_rtl_4|dffs[2], disp_drive[2]~reg0, disp_drive[1]~reg0, disp_drive[0]~reg0 ; lpm_counter:second_set1_rtl_4|dffs[0], lpm_counter:second_set1_rtl_4|dffs[1], lpm_counter:second_set1_rtl_4|dffs[2], second_set1[2] ;
; B ; LC27 ; SW2, lpm_counter:minute_set1_rtl_2|dffs[1], lpm_counter:minute_set1_rtl_2|dffs[0], lpm_counter:minute_set1_rtl_2|dffs[2], disp_drive[2]~reg0, disp_drive[1]~reg0, disp_drive[0]~reg0 ; lpm_counter:minute_set1_rtl_2|dffs[0], lpm_counter:minute_set1_rtl_2|dffs[1], lpm_counter:minute_set1_rtl_2|dffs[2], minute_set1[2] ;
; B ; LC30 ; SW2, lpm_counter:minute_set0_rtl_3|dffs[3], lpm_counter:minute_set0_rtl_3|dffs⌨️ 快捷键说明
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