📄 iurt_lib.vhd
字号:
CurrentAddr := LoadORStoreORSwapAddrCalc(ID, CWP, RegFile); end if; if IsStoreInst(ID.Mnemo) then if (ID.Mnemo = STB or EX.Mnemo = STBA) then SizeVar := BYTE; elsif (ID.Mnemo = STH or EX.Mnemo = STHA) then SizeVar := HALFWORD; elsif IsStoreDoubleInst(ID.Mnemo) then SizeVar := DOUBLEWORD; else SizeVar := WORDTYPE; end if; end if; if IsStoreInst(EX.Mnemo) then -- Size assignment + StoreData value assignment DestReg := GetIndex(EX.rd, CWP); if (EX.Mnemo = STB or EX.Mnemo = STBA) then StoreData(7 downto 0) := RegFile(DestReg)(7 downto 0); StoreData(15 downto 8) := RegFile(DestReg)(7 downto 0); StoreData(23 downto 16) := RegFile(DestReg)(7 downto 0); StoreData(31 downto 24) := RegFile(DestReg)(7 downto 0); elsif (EX.Mnemo = STH or EX.Mnemo = STHA) then StoreData(15 downto 0) := RegFile(DestReg)(15 downto 0); StoreData(31 downto 16) := RegFile(DestReg)(15 downto 0); elsif IsStoreDoubleInst(EX.Mnemo) then if (EX.Mnemo = I_STD or EX.Mnemo = STDA) then StoreData := RegFile((DestReg/2)*2); -- even-numbered register: 1st data. end if; else if not(IsStoreFP_CPInst(Ex.Mnemo)) then StoreData := RegFile(DestReg); end if; end if; end if; if (WR.Mnemo = I_STD or WR.Mnemo = STDA) then DestReg := GetIndex(WR.rd, CWP); StoreData := RegFile((DestReg/2)*2 + 1); -- odd-numbered register: 2nd data. end if; if ((IsStoreSingleInst(WR.Mnemo) and EX.Mnemo /= ANNULLED) or IsStoreDoubleInst(WR1.Mnemo)) then if ( not((IsBicc(nID.Mnemo) or IsFBfcc(nID.Mnemo)) and TakenBr) and nID.Mnemo /= CALL) then CurrentAddr := SaveCurrentAddr; -- Restore values of instruction -- addresses unless nID=Bicc or -- nID=FBfcc or nID=CALL end if; if S = '0' then -- restore value of the ASI bus ASIvar := USER_INST; else ASIvar := SUPERVISOR_INST; end if; SizeVar := WORDTYPE; end if; -- '''''''' LDSTUB & SWAP. ''''''''' if (ID.Mnemo = LDSTUB or ID.Mnemo = LDSTUBA or ID.Mnemo = SWAP or ID.Mnemo = SWAPA) then SaveCurrentAddr := CurrentAddr; Preserve_SavePrevAddr := SavePrevAddr; SavePrevAddr := PrevAddr; if S = '0' then ASIvar := USER_DATA; else ASIvar := SUPERVISOR_DATA; end if; if (ID.Mnemo = LDSTUBA or ID.Mnemo = SWAPA) then ASIvar := ID.asi; end if; if (ID.Mnemo = LDSTUBA or ID.Mnemo = LDSTUB) then SizeVar := BYTE; else SizeVar := WORDTYPE; end if; CurrentAddr := LoadORStoreORSwapAddrCalc(ID, CWP, RegFile); LoadDataAddr := CurrentAddr; end if; if (EX.Mnemo = LDSTUB or ID.Mnemo = LDSTUBA) then StoreData := (others => '1'); elsif (WR.Mnemo = SWAP or WR.Mnemo = SWAPA) then StoreData := SwapData; end if; if (WR1.Mnemo = LDSTUB or WR1.Mnemo = LDSTUBA or WR1.Mnemo = SWAP or WR1.Mnemo = SWAPA) then if ( not((IsBicc(nID.Mnemo) or IsFBfcc(nID.Mnemo)) and TakenBr) and nID.Mnemo /= CALL) then CurrentAddr := SaveCurrentAddr; -- Restore values of instruction -- addresses unless nID=Bicc or -- nID=FBfcc or nID=CALL end if; if S = '0' then -- restore value of the ASI bus ASIvar := USER_INST; else ASIvar := SUPERVISOR_INST; end if; SizeVar := WORDTYPE; end if; -- '''''''' JMPL & RETT: branching address calculation. ''''''''' if ( ID.Mnemo = JMPL or ID.Mnemo = RETT ) then JmplRettAddrCalc(ID, CWP, RegFile, CurrentAddr); end if; end if; --..... Assignment of variables corresponding to signals ..... --..... triggered on the rising edge of the clock CLK. ..... -- Signal ASI --> ASIvar if TrapMode /= NOTRAP then ASIvar := SUPERVISOR_INST; end if; -- Signal Size --> SizeVar if TrapMode /= NOTRAP then SizeVar := WORDTYPE; end if; -- Signal INTACK --> INTACKvar pINTACKvar := INTACKvar; if ( -- conditions for resetting-- Fixed to reset one clock earlier, Jiri Gaisler 30-01-96 ID.Mnemo = ANNULLED and EX.Mnemo = ANNULLED ) then INTACKvar := '0'; end if; if ( -- conditions for setting TriggerINTACK ) then INTACKvar := '1'; TriggerINTACK := FALSE; end if; -- Signal RD --> RDvar pTOpRDvar := pRDvar; pRDvar := RDvar; if TrapMode /= NOTRAP then RDvar := '1'; else if ( -- conditions for setting IsStoreSingleInst(WR.Mnemo) or IsStoreDoubleInst(WR1.Mnemo) or (WR1.Mnemo = LDSTUB or WR1.Mnemo = LDSTUBA) or (WR1.Mnemo = SWAP or WR1.Mnemo = SWAPA) ) then RDvar := '1'; end if; if ( -- conditions for resetting IsStoreInst(ID.Mnemo) or (EX.Mnemo = LDSTUB or EX.Mnemo = LDSTUBA) or (EX.Mnemo = SWAP or EX.Mnemo = SWAPA) ) then RDvar := '0'; end if; end if; -- Signal WE_N --> WE_Nvar pTOpWE_Nvar := pWE_Nvar; pWE_Nvar := WE_Nvar; if TrapMode /= NOTRAP then WE_Nvar := '1'; else if ( -- conditions for setting IsStoreSingleInst(WR.Mnemo) or IsStoreDoubleInst(WR1.Mnemo) or (WR1.Mnemo = LDSTUB or WR1.Mnemo = LDSTUBA) or (WR1.Mnemo = SWAP or WR1.Mnemo = SWAPA) ) then WE_Nvar := '1'; end if; if ( -- conditions for resetting IsStoreInst(EX.Mnemo) or (WR.Mnemo = LDSTUB or WR.Mnemo = LDSTUBA) or (WR.Mnemo = SWAP or WR.Mnemo = SWAPA) ) then WE_Nvar := '0'; end if; end if; -- Signal WRT --> WRTvar pTOpWRTvar := pWRTvar; pWRTvar := WRTvar; if TrapMode /= NOTRAP then WRTvar := '0'; else if ( -- conditions for resetting IsStoreInst(EX.Mnemo) or (WR.Mnemo = LDSTUB or WR.Mnemo = LDSTUBA) or (WR.Mnemo = SWAP or WR.Mnemo = SWAPA) ) then WRTvar := '0'; end if; if ( -- conditions for setting IsStoreInst(ID.Mnemo) or (EX.Mnemo = LDSTUB or EX.Mnemo = LDSTUBA) or (EX.Mnemo = SWAP or EX.Mnemo = SWAPA) ) then WRTvar := '1'; end if; end if; -- Signal DXFER --> DXFERvar pTOpDXFERvar := pDXFERvar; pDXFERvar := DXFERvar; if TrapMode /= NOTRAP then DXFERvar := '0'; else if ( -- conditions for resetting IsLoadSingleInst(EX.Mnemo) or IsLoadDoubleInst(WR.Mnemo) or IsStoreSingleInst(WR.Mnemo) or IsStoreDoubleInst(WR1.Mnemo) or (WR1.Mnemo = LDSTUB or WR1.Mnemo = LDSTUBA) or (WR1.Mnemo = SWAP or WR1.Mnemo = SWAPA) ) then DXFERvar := '0'; end if; if ( -- conditions for setting overriding resetting IsLoadInst(ID.Mnemo) or IsStoreInst(ID.Mnemo) or (ID.Mnemo = LDSTUB or ID.Mnemo = LDSTUBA) or (ID.Mnemo = SWAP or ID.Mnemo = SWAPA) ) then DXFERvar := '1'; end if; end if; -- Signal LDSTO --> LDSTOvar pTOpLDSTOvar := pLDSTOvar; pLDSTOvar := LDSTOvar; if TrapMode /= NOTRAP then LDSTOvar := '0'; else if ( -- conditions for resetting (WR1.Mnemo = LDSTUB or WR1.Mnemo = LDSTUBA) or (WR1.Mnemo = SWAP or WR1.Mnemo = SWAPA) ) then LDSTOvar := '0'; end if; if ( -- conditions for setting overriding resetting (ID.Mnemo = LDSTUB or ID.Mnemo = LDSTUBA) or (ID.Mnemo = SWAP or ID.Mnemo = SWAPA) ) then LDSTOvar := '1'; end if; end if; -- Signal INULL --> INULLvar pINULLvar := INULLvar; if TrapMode /= NOTRAP then INULLvar := '1'; else if ( -- conditions for resetting EX.Mnemo = RETT or (EX.Mnemo = JMPL and not(IOPcase)) or (WR.Mnemo = JMPL and ID.Mnemo = IOP) or (ID.Mnemo = ANNULLED and EX.Mnemo = ANNULLED) or (WR.Mnemo = CALL and EX.Mnemo = IOP) or (IsLoadSingleInst(WR1.Mnemo) and EX.Mnemo = IOP) or (IsLoadDoubleInst(WR2.Mnemo) and EX.Mnemo = IOP) or IsStoreInst(WR1.Mnemo) or (WR2.Mnemo = LDSTUB or WR2.Mnemo = LDSTUBA) or (WR2.Mnemo = SWAP or WR2.Mnemo = SWAPA) ) then INULLvar := '0'; end if; if ( -- conditions setting overriding resetting ID.Mnemo = JMPL or ID.Mnemo = RETT or (EX.Mnemo = CALL and ID.Mnemo = IOP) or (IsLoadSingleInst(WR.Mnemo) and ID.Mnemo = IOP and not isFPInst(WR.Mnemo) and not IsFPInst(ID.Mnemo)) or-- (IsLoadSingleInst(WR1.Mnemo) and -- ((WR1.rd = EX.rs1) or ((WR1.rd = EX.rs2) and (EX.i = 0)))) or (IsLoadDoubleInst(WR1.Mnemo) and ID.Mnemo = IOP and not isFPInst(WR1.Mnemo) and not IsFPInst(ID.Mnemo)) or (IsStoreInst(WR.Mnemo) and EX.Mnemo /= ANNULLED) or-- not isFPInst(WR.Mnemo) and not IsFPInst(EX.Mnemo)) or (WR1.Mnemo = LDSTUB or WR1.Mnemo = LDSTUBA) or (WR1.Mnemo = SWAP or WR1.Mnemo = SWAPA) ) then INULLvar := '1'; end if; end if; -- Signal LOCK -
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -