key_prog.map.qmsg

简单易懂的4*4键盘扫描及显示程序。对编写其他形式的键盘扫描程序有一定的指导意义.

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Oct 23 09:47:46 2006 " "Info: Processing started: Mon Oct 23 09:47:46 2006" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off key_prog -c key_prog " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off key_prog -c key_prog" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "key_scan.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file key_scan.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 key_scan-scan " "Info: Found design unit 1: key_scan-scan" {  } { { "key_scan.vhd" "" { Text "D:/key_prog/key_scan.vhd" 11 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 key_scan " "Info: Found entity 1: key_scan" {  } { { "key_scan.vhd" "" { Text "D:/key_prog/key_scan.vhd" 5 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "key_out.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file key_out.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 key_out-rt1 " "Info: Found design unit 1: key_out-rt1" {  } { { "key_out.vhd" "" { Text "D:/key_prog/key_out.vhd" 13 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 key_out " "Info: Found entity 1: key_out" {  } { { "key_out.vhd" "" { Text "D:/key_prog/key_out.vhd" 5 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "key_prog.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file key_prog.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 key_prog " "Info: Found entity 1: key_prog" {  } { { "key_prog.bdf" "" { Schematic "D:/key_prog/key_prog.bdf" { } } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "display.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file display.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 display-display_xht " "Info: Found design unit 1: display-display_xht" {  } { { "display.vhd" "" { Text "D:/key_prog/display.vhd" 10 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 display " "Info: Found entity 1: display" {  } { { "display.vhd" "" { Text "D:/key_prog/display.vhd" 3 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "key_prog " "Info: Elaborating entity \"key_prog\" for the top level hierarchy" {  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "key_scan key_scan:inst2 " "Info: Elaborating entity \"key_scan\" for hierarchy \"key_scan:inst2\"" {  } { { "key_prog.bdf" "inst2" { Schematic "D:/key_prog/key_prog.bdf" { { 168 56 152 264 "inst2" "" } } } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "display display:inst " "Info: Elaborating entity \"display\" for hierarchy \"display:inst\"" {  } { { "key_prog.bdf" "inst" { Schematic "D:/key_prog/key_prog.bdf" { { 168 416 552 264 "inst" "" } } } }  } 0}
{ "Info" "IVRFX_VHDL_CASE_STATEMENT_OTHERS_CLAUSE_NEVER_SELECTED" "display.vhd(32) " "Info: VHDL Case Statement information at display.vhd(32): OTHERS choice is never selected" {  } { { "display.vhd" "" { Text "D:/key_prog/display.vhd" 32 0 0 } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "key_out key_out:inst4 " "Info: Elaborating entity \"key_out\" for hierarchy \"key_out:inst4\"" {  } { { "key_prog.bdf" "inst4" { Schematic "D:/key_prog/key_prog.bdf" { { 168 200 352 264 "inst4" "" } } } }  } 0}
{ "Warning" "WVRFX_VHDL_USED_IMPLICIT_DEFAULT_VALUE" "scan_in key_out.vhd(15) " "Warning: VHDL Signal Declaration warning at key_out.vhd(15): used implicit default value for signal \"scan_in\" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations." {  } { { "key_out.vhd" "" { Text "D:/key_prog/key_out.vhd" 15 0 0 } }  } 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_NET" "temp\[3\] X key_out.vhd(14) " "Warning: Tied undriven net \"temp\[3\]\" at key_out.vhd(14) to X" {  } { { "key_out.vhd" "" { Text "D:/key_prog/key_out.vhd" 14 0 0 } }  } 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_NET" "temp\[2\] X key_out.vhd(14) " "Warning: Tied undriven net \"temp\[2\]\" at key_out.vhd(14) to X" {  } { { "key_out.vhd" "" { Text "D:/key_prog/key_out.vhd" 14 0 0 } }  } 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_NET" "temp\[1\] X key_out.vhd(14) " "Warning: Tied undriven net \"temp\[1\]\" at key_out.vhd(14) to X" {  } { { "key_out.vhd" "" { Text "D:/key_prog/key_out.vhd" 14 0 0 } }  } 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_NET" "temp\[0\] X key_out.vhd(14) " "Warning: Tied undriven net \"temp\[0\]\" at key_out.vhd(14) to X" {  } { { "key_out.vhd" "" { Text "D:/key_prog/key_out.vhd" 14 0 0 } }  } 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "display:inst\|q\[5\] High " "Info: Power-up level of register \"display:inst\|q\[5\]\" is not specified -- using power-up level of High to minimize register" {  } { { "display.vhd" "" { Text "D:/key_prog/display.vhd" 7 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "display:inst\|q\[5\] data_in VCC " "Warning: Reduced register \"display:inst\|q\[5\]\" with stuck data_in port to stuck value VCC" {  } { { "display.vhd" "" { Text "D:/key_prog/display.vhd" 7 -1 0 } }  } 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "display:inst\|q\[4\] High " "Info: Power-up level of register \"display:inst\|q\[4\]\" is not specified -- using power-up level of High to minimize register" {  } { { "display.vhd" "" { Text "D:/key_prog/display.vhd" 7 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "display:inst\|q\[4\] data_in VCC " "Warning: Reduced register \"display:inst\|q\[4\]\" with stuck data_in port to stuck value VCC" {  } { { "display.vhd" "" { Text "D:/key_prog/display.vhd" 7 -1 0 } }  } 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "display:inst\|q\[3\] High " "Info: Power-up level of register \"display:inst\|q\[3\]\" is not specified -- using power-up level of High to minimize register" {  } { { "display.vhd" "" { Text "D:/key_prog/display.vhd" 7 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "display:inst\|q\[3\] data_in VCC " "Warning: Reduced register \"display:inst\|q\[3\]\" with stuck data_in port to stuck value VCC" {  } { { "display.vhd" "" { Text "D:/key_prog/display.vhd" 7 -1 0 } }  } 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "display:inst\|q\[2\] High " "Info: Power-up level of register \"display:inst\|q\[2\]\" is not specified -- using power-up level of High to minimize register" {  } { { "display.vhd" "" { Text "D:/key_prog/display.vhd" 7 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "display:inst\|q\[2\] data_in VCC " "Warning: Reduced register \"display:inst\|q\[2\]\" with stuck data_in port to stuck value VCC" {  } { { "display.vhd" "" { Text "D:/key_prog/display.vhd" 7 -1 0 } }  } 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "display:inst\|q\[1\] High " "Info: Power-up level of register \"display:inst\|q\[1\]\" is not specified -- using power-up level of High to minimize register" {  } { { "display.vhd" "" { Text "D:/key_prog/display.vhd" 7 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "display:inst\|q\[1\] data_in VCC " "Warning: Reduced register \"display:inst\|q\[1\]\" with stuck data_in port to stuck value VCC" {  } { { "display.vhd" "" { Text "D:/key_prog/display.vhd" 7 -1 0 } }  } 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "display:inst\|q\[0\] High " "Info: Power-up level of register \"display:inst\|q\[0\]\" is not specified -- using power-up level of High to minimize register" {  } { { "display.vhd" "" { Text "D:/key_prog/display.vhd" 7 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "display:inst\|q\[0\] data_in VCC " "Warning: Reduced register \"display:inst\|q\[0\]\" with stuck data_in port to stuck value VCC" {  } { { "display.vhd" "" { Text "D:/key_prog/display.vhd" 7 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "display:inst\|q\[6\] data_in GND " "Warning: Reduced register \"display:inst\|q\[6\]\" with stuck data_in port to stuck value GND" {  } { { "display.vhd" "" { Text "D:/key_prog/display.vhd" 7 -1 0 } }  } 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "soeplay\[6\] GND " "Warning: Pin \"soeplay\[6\]\" stuck at GND" {  } { { "key_prog.bdf" "" { Schematic "D:/key_prog/key_prog.bdf" { { 104 568 744 120 "soeplay\[6..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "soeplay\[5\] VCC " "Warning: Pin \"soeplay\[5\]\" stuck at VCC" {  } { { "key_prog.bdf" "" { Schematic "D:/key_prog/key_prog.bdf" { { 104 568 744 120 "soeplay\[6..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "soeplay\[4\] VCC " "Warning: Pin \"soeplay\[4\]\" stuck at VCC" {  } { { "key_prog.bdf" "" { Schematic "D:/key_prog/key_prog.bdf" { { 104 568 744 120 "soeplay\[6..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "soeplay\[3\] VCC " "Warning: Pin \"soeplay\[3\]\" stuck at VCC" {  } { { "key_prog.bdf" "" { Schematic "D:/key_prog/key_prog.bdf" { { 104 568 744 120 "soeplay\[6..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "soeplay\[2\] VCC " "Warning: Pin \"soeplay\[2\]\" stuck at VCC" {  } { { "key_prog.bdf" "" { Schematic "D:/key_prog/key_prog.bdf" { { 104 568 744 120 "soeplay\[6..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "soeplay\[1\] VCC " "Warning: Pin \"soeplay\[1\]\" stuck at VCC" {  } { { "key_prog.bdf" "" { Schematic "D:/key_prog/key_prog.bdf" { { 104 568 744 120 "soeplay\[6..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "soeplay\[0\] VCC " "Warning: Pin \"soeplay\[0\]\" stuck at VCC" {  } { { "key_prog.bdf" "" { Schematic "D:/key_prog/key_prog.bdf" { { 104 568 744 120 "soeplay\[6..0\]" "" } } } }  } 0}  } {  } 0}
{ "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN_HDR" "4 " "Warning: Design contains 4 input pin(s) that do not drive logic" { { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "key_out\[3\] " "Warning: No output dependent on input pin \"key_out\[3\]\"" {  } { { "key_prog.bdf" "" { Schematic "D:/key_prog/key_prog.bdf" { { 280 -136 32 296 "key_out\[3..0\]" "" } } } }  } 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "key_out\[2\] " "Warning: No output dependent on input pin \"key_out\[2\]\"" {  } { { "key_prog.bdf" "" { Schematic "D:/key_prog/key_prog.bdf" { { 280 -136 32 296 "key_out\[3..0\]" "" } } } }  } 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "key_out\[1\] " "Warning: No output dependent on input pin \"key_out\[1\]\"" {  } { { "key_prog.bdf" "" { Schematic "D:/key_prog/key_prog.bdf" { { 280 -136 32 296 "key_out\[3..0\]" "" } } } }  } 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "key_out\[0\] " "Warning: No output dependent on input pin \"key_out\[0\]\"" {  } { { "key_prog.bdf" "" { Schematic "D:/key_prog/key_prog.bdf" { { 280 -136 32 296 "key_out\[3..0\]" "" } } } }  } 0}  } {  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "20 " "Info: Implemented 20 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "5 " "Info: Implemented 5 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "11 " "Info: Implemented 11 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_LCELLS" "4 " "Info: Implemented 4 logic cells" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 25 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 25 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Mon Oct 23 09:47:51 2006 " "Info: Processing ended: Mon Oct 23 09:47:51 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:06 " "Info: Elapsed time: 00:00:06" {  } {  } 0}  } {  } 0}