vga_sys.sopc

verilog代码读写SDRAM 不带仿真

<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
<system name="vga_sys">
    <parameter valueString="27970489522" name="systemHash"/>
    <parameter name="quartusRootDir">c:\altera\72\quartus</parameter>
    <parameter valueString="1194580501562" name="timeStamp"/>
    <parameter valueString="false" name="generateLegacySDK"/>
    <parameter name="bonusData">bonusData 
{
   element sysid
   {
      datum _sortIndex
      {
         value = "2";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element led_pio.s1
   {
      datum baseAddress
      {
         value = "34607200";
         type = "long";
      }
   }
   element vga_sys
   {
   }
   element jtag_uart.avalon_jtag_slave
   {
      datum baseAddress
      {
         value = "34607216";
         type = "long";
      }
   }
   element jtag_uart
   {
      datum _sortIndex
      {
         value = "1";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element freedev_vga_inst
   {
      datum _sortIndex
      {
         value = "9";
         type = "int";
      }
   }
   element tristate_bridge.avalon_slave
   {
      datum baseAddress
      {
         value = "0";
         type = "long";
      }
   }
   element sys_clk_timer
   {
      datum _sortIndex
      {
         value = "4";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element tristate_bridge
   {
      datum _sortIndex
      {
         value = "6";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element freedev_sram_0.avalon_tristate_slave_0
   {
      datum baseAddress
      {
         value = "34078720";
         type = "long";
      }
   }
   element sysid.control_slave
   {
      datum baseAddress
      {
         value = "34607224";
         type = "long";
      }
   }
   element cpu
   {
      datum _sortIndex
      {
         value = "0";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element cfi_flash.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "0";
         type = "long";
      }
   }
   element freedev_sram_0
   {
      datum _sortIndex
      {
         value = "8";
         type = "int";
      }
   }
   element clk
   {
   }
   element sys_clk_timer.s1
   {
      datum baseAddress
      {
         value = "34607168";
         type = "long";
      }
   }
   element sdram
   {
      datum _sortIndex
      {
         value = "3";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element led_pio
   {
      datum _sortIndex
      {
         value = "5";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element cfi_flash
   {
      datum _sortIndex
      {
         value = "7";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element sdram.s1
   {
      datum baseAddress
      {
         value = "134217728";
         type = "long";
      }
   }
   element cpu.jtag_debug_module
   {
      datum baseAddress
      {
         value = "34605056";
         type = "long";
      }
   }
   element freedev_vga_inst.avalon_slave_0
   {
      datum baseAddress
      {
         value = "34607104";
         type = "long";
      }
   }
}
</parameter>
    <parameter valueString="false" name="hardcopyCompatible"/>
    <parameter valueString="CYCLONEII" name="deviceFamily"/>
    <parameter valueString="false" name="generateLegacySim"/>
    <parameter valueString="vga_system.qpf" name="projectName"/>
    <parameter valueString="VERILOG" name="hdlLanguage"/>
    <parameter name="projectDirectory">D:\FreeDevDAV\example\vga_system</parameter>
    <module version="7.2" name="clk" kind="clock_source">
        <parameter valueString="true" name="clockFrequencyKnown"/>
        <parameter valueString="75000000" name="clockFrequency"/>
    </module>
    <module version="7.2" name="cpu" kind="altera_nios2">
        <parameter valueString="" name="userDefinedSettings"/>
        <parameter valueString="Automatic" name="setting_branchPredictionType"/>
        <parameter valueString="_10" name="mmu_processIDNumBits"/>
        <parameter valueString="32" name="exceptionOffset"/>
        <parameter valueString="EmbeddedMulFast" name="muldiv_multiplierType"/>
        <parameter valueString="_4096" name="icache_size"/>
        <parameter valueString="_128" name="debug_OCIOnchipTrace"/>
        <parameter valueString="Fast" name="impl"/>
        <parameter valueString="_4" name="mmu_uitlbNumEntries"/>
        <parameter valueString="sdram.s1" name="exceptionSlave"/>
        <parameter valueString="false" name="dcache_omitDataMaster"/>
        <parameter valueString="0" name="mmu_TLBMissExcOffset"/>
        <parameter valueString="false" name="setting_illegalMemAccessDetection"/>
        <parameter valueString="32" name="breakOffset"/>
        <parameter valueString="true" name="debug_embeddedPLL"/>
        <parameter valueString="false" name="setting_debugSimGen"/>
        <parameter valueString="false" name="setting_alwaysBypassDCache"/>
        <parameter valueString="_0" name="icache_numTCIM"/>
        <parameter valueString="false" name="setting_showInternalSettings"/>
        <parameter valueString="false" name="setting_illegalInstructionsTrap"/>
        <parameter valueString="0" name="resetOffset"/>
        <parameter valueString="false" name="setting_bhtIndexPcOnly"/>
        <parameter valueString="true" name="setting_HDLSimCachesCleared"/>
        <parameter valueString="true" name="setting_alwaysEncrypt"/>
        <parameter valueString="false" name="setting_activateModelChecker"/>
        <parameter valueString="_32" name="dcache_lineSize"/>
        <parameter valueString="false" name="setting_allowFullAddressRange"/>
        <parameter valueString="_7" name="mmu_dtlbPtrSz"/>
        <parameter valueString="_4" name="mmu_itlbNumWays"/>
        <parameter valueString="false" name="setting_avalonDebugPortPresent"/>
        <parameter valueString="false" name="cpuReset"/>
        <parameter valueString="true" name="setting_clearXBitsLDNonBypass"/>
        <parameter valueString="_4" name="mmu_dtlbNumWays"/>
        <parameter valueString="cfi_flash.s1" name="resetSlave"/>
        <parameter valueString="_32" name="setting_perfCounterWidth"/>
        <parameter valueString="" name="mmu_TLBMissExcSlave"/>
        <parameter name="breakSlave">cpu.jtag_debug_module</parameter>
        <parameter valueString="false" name="setting_preciseIllegalMemAccessException"/>
        <parameter valueString="Level1" name="debug_level"/>
        <parameter valueString="false" name="muldiv_divider"/>
        <parameter valueString="false" name="dcache_bursts"/>
        <parameter valueString="true" name="setting_activateMonitors"/>
        <parameter valueString="true" name="setting_bit31BypassDCache"/>
        <parameter valueString="Automatic" name="icache_ramBlockType"/>
        <parameter valueString="_8" name="setting_bhtPtrSz"/>
        <parameter valueString="false" name="setting_preciseDivisionErrorException"/>
        <parameter valueString="false" name="setting_preciseSlaveAccessErrorException"/>
        <parameter valueString="false" name="debug_debugReqSignals"/>
        <parameter valueString="_6" name="mmu_udtlbNumEntries"/>
        <parameter valueString="_0" name="dcache_numTCDM"/>
        <parameter valueString="false" name="setting_fullWaveformSignals"/>
        <parameter valueString="false" name="setting_performanceCounter"/>
        <parameter valueString="_7" name="mmu_itlbPtrSz"/>
        <parameter valueString="_2048" name="dcache_size"/>
        <parameter valueString="Automatic" name="dcache_ramBlockType"/>
        <parameter valueString="true" name="setting_activateTrace"/>
        <parameter valueString="false" name="setting_HBreakTest"/>
        <parameter valueString="false" name="setting_exportPCB"/>
        <parameter valueString="false" name="setting_activateTestEndChecker"/>
        <parameter valueString="None" name="icache_burstType"/>
        <parameter valueString="false" name="setting_showUnpublishedSettings"/>
        <parameter valueString="true" name="debug_triggerArming"/>
        <parameter valueString="false" name="mmu_enabled"/>
    </module>
    <module version="7.2" name="jtag_uart" kind="altera_avalon_jtag_uart">
        <parameter valueString="8" name="readIRQThreshold"/>
        <parameter valueString="" name="simInputCharacterStream"/>
        <parameter valueString="0" name="hubInstanceID"/>
        <parameter valueString="64" name="readBufferDepth"/>
        <parameter valueString="false" name="allowMultipleConnections"/>
        <parameter valueString="64" name="writeBufferDepth"/>
        <parameter valueString="8" name="writeIRQThreshold"/>
        <parameter valueString="false" name="useRegistersForWriteBuffer"/>
        <parameter valueString="false" name="useRegistersForReadBuffer"/>
        <parameter name="simInteractiveOptions">INTERACTIVE_ASCII_OUTPUT</parameter>
    </module>
    <module version="7.2" name="sysid" kind="altera_avalon_sysid">
        <parameter valueString="1194580502" name="timestamp"/>
        <parameter valueString="53202111" name="id"/>
    </module>
    <module version="7.2" name="sdram" kind="altera_avalon_new_sdram_controller">
        <parameter valueString="20.0" name="TRP"/>
        <parameter valueString="16" name="dataWidth"/>
        <parameter valueString="13" name="rowWidth"/>
        <parameter valueString="70.0" name="TRFC"/>
        <parameter valueString="true" name="registerDataIn"/>
        <parameter valueString="3" name="casLatency"/>
        <parameter valueString="100.0" name="powerUpDelay"/>
        <parameter valueString="true" name="generateSimulationModel"/>
        <parameter valueString="2" name="initRefreshCommands"/>
        <parameter valueString="" name="masteredTristateBridgeSlave"/>
        <parameter valueString="3" name="TMRD"/>