vga_sys_log.txt

verilog代码读写SDRAM 不带仿真

Altera SOPC Builder Version 7.20 Build 151
Copyright (c) 1999-2007 Altera Corporation.  All rights reserved.


# 2007.11.09 11:55:42 (*) mk_custom_sdk starting
# 2007.11.09 11:55:42 (*) Reading project D:/FreeDevDAV/example/vga_system/vga_sys.ptf.

# 2007.11.09 11:55:42 (*) Finding all CPUs
# 2007.11.09 11:55:42 (*) Finding all available components
# 2007.11.09 11:55:42 (*) Reading D:/FreeDevDAV/example/vga_system/.sopc_builder/install.ptf

# 2007.11.09 11:55:42 (*) Found 77 components

# 2007.11.09 11:55:43 (*) Finding all peripherals

# 2007.11.09 11:55:43 (*) Finding software components

# 2007.11.09 11:55:44 (*) (Legacy SDK Generation Skipped)
# 2007.11.09 11:55:44 (*) (All TCL Script Generation Skipped)
# 2007.11.09 11:55:44 (*) (No Libraries Built)
# 2007.11.09 11:55:44 (*) (Contents Generation Skipped)
# 2007.11.09 11:55:44 (*) mk_custom_sdk finishing

# 2007.11.09 11:55:44 (*) Starting generation for system: vga_sys.

.
.
.
.
.
.
.
.
.

# 2007.11.09 11:55:46 (*) Running Generator Program for cpu

# 2007.11.09 11:55:48 (*)   Checking for plaintext license.
# 2007.11.09 11:55:49 (*)   Plaintext license found.
# 2007.11.09 11:55:55 (*)   Creating plain-text HDL

# 2007.11.09 11:56:01 (*) Running Generator Program for jtag_uart

# 2007.11.09 11:56:03 (*) Running Generator Program for sysid

# 2007.11.09 11:56:04 (*) Running Generator Program for sdram

# 2007.11.09 11:56:06 (*) Running Generator Program for sys_clk_timer

# 2007.11.09 11:56:08 (*) Running Generator Program for led_pio

# 2007.11.09 11:56:09 (*) Running Generator Program for cfi_flash

# 2007.11.09 11:56:10 (*) Running Generator Program for freedev_sram_0

# 2007.11.09 11:56:11 (*) Running Generator Program for burst_0

.


# 2007.11.09 11:56:12 (*) Running Test Generator Program for sdram

# 2007.11.09 11:56:14 (*) Making arbitration and system (top) modules.

# 2007.11.09 11:56:26 (*) Generating Quartus symbol for top level: vga_sys

# 2007.11.09 11:56:26 (*) Generating Symbol D:/FreeDevDAV/example/vga_system/vga_sys.bsf

# 2007.11.09 11:56:26 (*) Creating command-line system-generation script: D:/FreeDevDAV/example/vga_system/vga_sys_generation_script

# 2007.11.09 11:56:27 (*) Running setup for HDL simulator: modelsim


# 2007.11.09 11:56:27 (*) Setting up Quartus with vga_sys_setup_quartus.tcl
c:/altera/72/quartus/bin/quartus_sh -t vga_sys_setup_quartus.tcl


Info: *******************************************************************
Info: Running Quartus II Shell
    Info: Version 7.2 Build 151 09/26/2007 SJ Full Version
    Info: Copyright (C) 1991-2007 Altera Corporation. All rights reserved.
    Info: Your use of Altera Corporation's design tools, logic functions 
    Info: and other software and tools, and its AMPP partner logic 
    Info: functions, and any output files from any of the foregoing 
    Info: (including device programming or simulation files), and any 
    Info: associated documentation or information are expressly subject 
    Info: to the terms and conditions of the Altera Program License 
    Info: Subscription Agreement, Altera MegaCore Function License 
    Info: Agreement, or other applicable license agreement, including, 
    Info: without limitation, that your use is for the sole purpose of 
    Info: programming logic devices manufactured by Altera and sold by 
    Info: Altera or its authorized distributors.  Please refer 
to the 
    Info: applicable agreement for further details.
    Info: Processing started: Fri Nov 09 11:56:27 2007
Info: Command: quartus_sh -t vga_sys_setup_quartus.tcl
Info: Evaluation of Tcl script vga_sys_setup_quartus.tcl was successful
Info: Quartus II Shell was successful. 0 errors, 0 warnings
    Info: Allocated 46 megabytes of memory during processing
    Info: Processing ended: Fri Nov 09 11:56:27 2007
    Info: Elapsed time: 00:00:00

# 2007.11.09 11:56:27 (*) Completed generation for system: vga_sys.
# 2007.11.09 11:56:27 (*) THE FOLLOWING SYSTEM ITEMS HAVE BEEN GENERATED:
  SOPC Builder database : D:/FreeDevDAV/example/vga_system/vga_sys.ptf 
  System HDL Model : D:/FreeDevDAV/example/vga_system/vga_sys.v 
  System Generation Script : D:/FreeDevDAV/example/vga_system/vga_sys_generation_script 

# 2007.11.09 11:56:27 (*) SUCCESS: SYSTEM GENERATION COMPLETED.


Press 'Exit' to exit.