📄 hour.fit.eqn
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-- Copyright (C) 1991-2005 Altera Corporation
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-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
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-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
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--count[0] is count[0] at LC1_A14
--operation mode is arithmetic
count[0]_lut_out = !count[0] & A1L15;
count[0] = DFFEA(count[0]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , );
--A1L4Q is count[0]~500 at LC1_A14
--operation mode is arithmetic
A1L4Q = count[0];
--E2_cout[0] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[0] at LC1_A14
--operation mode is arithmetic
E2_cout[0] = CARRY(count[0]);
--count[1] is count[1] at LC8_A13
--operation mode is normal
count[1]_lut_out = E2_cs_buffer[1] & A1L24 & !A1L27;
count[1] = DFFEA(count[1]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , );
--A1L6Q is count[1]~501 at LC8_A13
--operation mode is normal
A1L6Q = count[1];
--count[2] is count[2] at LC5_A13
--operation mode is normal
count[2]_lut_out = E2_cs_buffer[2] & A1L24 & !A1L27;
count[2] = DFFEA(count[2]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , );
--A1L8Q is count[2]~502 at LC5_A13
--operation mode is normal
A1L8Q = count[2];
--count[3] is count[3] at LC3_A13
--operation mode is normal
count[3]_lut_out = E2_cs_buffer[3] & A1L24 & !A1L27;
count[3] = DFFEA(count[3]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , );
--A1L10Q is count[3]~503 at LC3_A13
--operation mode is normal
A1L10Q = count[3];
--count[4] is count[4] at LC4_A13
--operation mode is normal
count[4]_lut_out = A1L24 & (A1L27 & E5_cs_buffer[4] # !A1L27 & (E2_cs_buffer[4]));
count[4] = DFFEA(count[4]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , );
--A1L12Q is count[4]~504 at LC4_A13
--operation mode is normal
A1L12Q = count[4];
--count[5] is count[5] at LC1_A13
--operation mode is normal
count[5]_lut_out = A1L24 & (A1L27 & C2_unreg_res_node[5] # !A1L27 & (C1_unreg_res_node[5]));
count[5] = DFFEA(count[5]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , );
--A1L14Q is count[5]~505 at LC1_A13
--operation mode is normal
A1L14Q = count[5];
--E2_cs_buffer[1] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] at LC2_A14
--operation mode is arithmetic
E2_cs_buffer[1] = count[1] $ E2_cout[0];
--E2L9 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~63 at LC2_A14
--operation mode is arithmetic
E2L9 = count[1] $ E2_cout[0];
--E2_cout[1] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[1] at LC2_A14
--operation mode is arithmetic
E2_cout[1] = CARRY(count[1] & E2_cout[0]);
--A1L24 is LessThan~33 at LC6_A13
--operation mode is normal
A1L24 = !count[2] & !count[3] & !count[4] # !count[5];
--A1L25 is LessThan~34 at LC6_A13
--operation mode is normal
A1L25 = !count[2] & !count[3] & !count[4] # !count[5];
--A1L27 is rtl~28 at LC7_A13
--operation mode is normal
A1L27 = count[0] & count[3] & !count[1] & !count[2];
--A1L28 is rtl~29 at LC7_A13
--operation mode is normal
A1L28 = count[0] & count[3] & !count[1] & !count[2];
--E2_cs_buffer[2] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] at LC3_A14
--operation mode is arithmetic
E2_cs_buffer[2] = count[2] $ E2_cout[1];
--E2L11 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~64 at LC3_A14
--operation mode is arithmetic
E2L11 = count[2] $ E2_cout[1];
--E2_cout[2] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[2] at LC3_A14
--operation mode is arithmetic
E2_cout[2] = CARRY(count[2] & E2_cout[1]);
--E2_cs_buffer[3] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] at LC4_A14
--operation mode is arithmetic
E2_cs_buffer[3] = count[3] $ E2_cout[2];
--E2L13 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]~65 at LC4_A14
--operation mode is arithmetic
E2L13 = count[3] $ E2_cout[2];
--E2_cout[3] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[3] at LC4_A14
--operation mode is arithmetic
E2_cout[3] = CARRY(count[3] & E2_cout[2]);
--E5_cs_buffer[4] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] at LC5_A15
--operation mode is arithmetic
E5_cs_buffer[4] = count[4] $ E5_cout[3];
--E5L17 is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~75 at LC5_A15
--operation mode is arithmetic
E5L17 = count[4] $ E5_cout[3];
--E5_cout[4] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[4] at LC5_A15
--operation mode is arithmetic
E5_cout[4] = CARRY(count[4] & E5_cout[3]);
--E2_cs_buffer[4] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] at LC5_A14
--operation mode is arithmetic
E2_cs_buffer[4] = count[4] $ E2_cout[3];
--E2L15 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~66 at LC5_A14
--operation mode is arithmetic
E2L15 = count[4] $ E2_cout[3];
--E2_cout[4] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[4] at LC5_A14
--operation mode is arithmetic
E2_cout[4] = CARRY(count[4] & E2_cout[3]);
--C2_unreg_res_node[5] is lpm_add_sub:add_rtl_1|addcore:adder|unreg_res_node[5] at LC6_A15
--operation mode is normal
C2_unreg_res_node[5] = E5_cout[4] $ count[5];
--C2L3 is lpm_add_sub:add_rtl_1|addcore:adder|unreg_res_node[5]~11 at LC6_A15
--operation mode is normal
C2L3 = E5_cout[4] $ count[5];
--C1_unreg_res_node[5] is lpm_add_sub:add_rtl_0|addcore:adder|unreg_res_node[5] at LC6_A14
--operation mode is normal
C1_unreg_res_node[5] = E2_cout[4] $ count[5];
--C1L3 is lpm_add_sub:add_rtl_0|addcore:adder|unreg_res_node[5]~11 at LC6_A14
--operation mode is normal
C1L3 = E2_cout[4] $ count[5];
--A1L15 is count~499 at LC2_A13
--operation mode is normal
A1L15 = A1L24 & !A1L27;
--A1L16 is count~506 at LC2_A13
--operation mode is normal
A1L16 = A1L24 & !A1L27;
--E5_cs_buffer[3] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] at LC4_A15
--operation mode is arithmetic
E5_cs_buffer[3] = count[3] $ E5_cout[2];
--E5L15 is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]~76 at LC4_A15
--operation mode is arithmetic
E5L15 = count[3] $ E5_cout[2];
--E5_cout[3] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[3] at LC4_A15
--operation mode is arithmetic
E5_cout[3] = CARRY(count[3] & E5_cout[2]);
--E5_cs_buffer[2] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] at LC3_A15
--operation mode is arithmetic
E5_cs_buffer[2] = count[2] $ E5_cout[1];
--E5L13 is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~77 at LC3_A15
--operation mode is arithmetic
E5L13 = count[2] $ E5_cout[1];
--E5_cout[2] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[2] at LC3_A15
--operation mode is arithmetic
E5_cout[2] = CARRY(count[2] # E5_cout[1]);
--E5_cs_buffer[1] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] at LC2_A15
--operation mode is arithmetic
E5_cs_buffer[1] = count[1] $ E5_cout[0];
--E5L11 is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~78 at LC2_A15
--operation mode is arithmetic
E5L11 = count[1] $ E5_cout[0];
--E5_cout[1] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[1] at LC2_A15
--operation mode is arithmetic
E5_cout[1] = CARRY(count[1] # E5_cout[0]);
--E5_cs_buffer[0] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0] at LC1_A15
--operation mode is arithmetic
E5_cs_buffer[0] = count[0];
--E5L9 is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~79 at LC1_A15
--operation mode is arithmetic
E5L9 = count[0];
--E5_cout[0] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[0] at LC1_A15
--operation mode is arithmetic
E5_cout[0] = CARRY(count[0]);
--clk is clk at PIN_43
--operation mode is input
clk = INPUT();
--reset is reset at PIN_84
--operation mode is input
reset = INPUT();
--daout[0] is daout[0] at PIN_16
--operation mode is output
daout[0] = OUTPUT(count[0]);
--daout[1] is daout[1] at PIN_69
--operation mode is output
daout[1] = OUTPUT(count[1]);
--daout[2] is daout[2] at PIN_70
--operation mode is output
daout[2] = OUTPUT(count[2]);
--daout[3] is daout[3] at PIN_72
--operation mode is output
daout[3] = OUTPUT(count[3]);
--daout[4] is daout[4] at PIN_71
--operation mode is output
daout[4] = OUTPUT(count[4]);
--daout[5] is daout[5] at PIN_73
--operation mode is output
daout[5] = OUTPUT(count[5]);
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