clock.map.eqn

vhdl语言

-- Copyright (C) 1991-2005 Altera Corporation
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-- and other software and tools, and its AMPP partner logic 
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-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
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-- applicable agreement for further details.
--B1_count1[1] is alert:inst|count1[1]
--operation mode is normal

B1_count1[1]_lut_out = B1_count1[0] & !B1_count1[1];
B1_count1[1] = DFFEA(B1_count1[1]_lut_out, clk, , , A1L15, , );

--B1L6Q is alert:inst|count1[1]~27
--operation mode is normal

B1L6Q = B1_count1[1];


--B1_lamp[2] is alert:inst|lamp[2]
--operation mode is normal

B1_lamp[2]_lut_out = B1_count[1] & (B1_lamp[2] # !B1_count[0]);
B1_lamp[2] = DFFEA(B1_lamp[2]_lut_out, clk, , , B1L18, , );

--B1L17Q is alert:inst|lamp[2]~122
--operation mode is normal

B1L17Q = B1_lamp[2];


--B1_lamp[1] is alert:inst|lamp[1]
--operation mode is normal

B1_lamp[1]_lut_out = B1_count[0] & (B1_lamp[1] # !B1_count[1]);
B1_lamp[1] = DFFEA(B1_lamp[1]_lut_out, clk, , , B1L18, , );

--B1L15Q is alert:inst|lamp[1]~123
--operation mode is normal

B1L15Q = B1_lamp[1];


--B1_lamp[0] is alert:inst|lamp[0]
--operation mode is normal

B1_lamp[0]_lut_out = B1_count[1] & B1_count[0] & B1_lamp[0] # !B1_count[1] & !B1_count[0];
B1_lamp[0] = DFFEA(B1_lamp[0]_lut_out, clk, , , B1L18, , );

--B1L13Q is alert:inst|lamp[0]~124
--operation mode is normal

B1L13Q = B1_lamp[0];


--G1_count[2] is seltime:inst5|count[2]
--operation mode is normal

G1_count[2]_lut_out = G1_count[2] & (!G1_count[1] & !G1_count[0]) # !G1_count[2] & (G1_count[1] & G1_count[0]);
G1_count[2] = DFFEA(G1_count[2]_lut_out, clkdsp, reset, , , , );

--G1L7Q is seltime:inst5|count[2]~76
--operation mode is normal

G1L7Q = G1_count[2];


--G1_count[1] is seltime:inst5|count[1]
--operation mode is normal

G1_count[1]_lut_out = !G1_count[2] & (G1_count[1] $ G1_count[0]);
G1_count[1] = DFFEA(G1_count[1]_lut_out, clkdsp, reset, , , , );

--G1L5Q is seltime:inst5|count[1]~77
--operation mode is normal

G1L5Q = G1_count[1];


--G1_count[0] is seltime:inst5|count[0]
--operation mode is normal

G1_count[0]_lut_out = !G1_count[0] & (!G1_count[1] # !G1_count[2]);
G1_count[0] = DFFEA(G1_count[0]_lut_out, clkdsp, reset, , , , );

--G1L3Q is seltime:inst5|count[0]~78
--operation mode is normal

G1L3Q = G1_count[0];


--B1_count1[0] is alert:inst|count1[0]
--operation mode is normal

B1_count1[0]_lut_out = !B1_count1[0] & !B1_count1[1];
B1_count1[0] = DFFEA(B1_count1[0]_lut_out, clk, , , A1L15, , );

--B1L4Q is alert:inst|count1[0]~28
--operation mode is normal

B1L4Q = B1_count1[0];


--D1_count[2] is minute:inst2|count[2]
--operation mode is normal

D1_count[2]_lut_out = D1L16 & L2_cs_buffer[2];
D1_count[2] = DFFEA(D1_count[2]_lut_out, E1_enmin, reset, , sethour, , );

--D1L7Q is minute:inst2|count[2]~563
--operation mode is normal

D1L7Q = D1_count[2];


--D1_count[1] is minute:inst2|count[1]
--operation mode is normal

D1_count[1]_lut_out = L2_cs_buffer[1] & D1L16;
D1_count[1] = DFFEA(D1_count[1]_lut_out, E1_enmin, reset, , sethour, , );

--D1L5Q is minute:inst2|count[1]~564
--operation mode is normal

D1L5Q = D1_count[1];


--D1_count[5] is minute:inst2|count[5]
--operation mode is normal

D1_count[5]_lut_out = D1L18;
D1_count[5] = DFFEA(D1_count[5]_lut_out, E1_enmin, reset, , sethour, , );

--D1L13Q is minute:inst2|count[5]~565
--operation mode is normal

D1L13Q = D1_count[5];


--D1_count[4] is minute:inst2|count[4]
--operation mode is normal

D1_count[4]_lut_out = D1L19 # D1L16 & L2_cs_buffer[4];
D1_count[4] = DFFEA(D1_count[4]_lut_out, E1_enmin, reset, , sethour, , );

--D1L11Q is minute:inst2|count[4]~566
--operation mode is normal

D1L11Q = D1_count[4];


--A1L16 is rtl~144
--operation mode is normal

A1L16 = !D1_count[2] & !D1_count[1] & !D1_count[5] & !D1_count[4];

--A1L19 is rtl~147
--operation mode is normal

A1L19 = !D1_count[2] & !D1_count[1] & !D1_count[5] & !D1_count[4];


--D1_count[3] is minute:inst2|count[3]
--operation mode is normal

D1_count[3]_lut_out = L2_cs_buffer[3] & D1L16;
D1_count[3] = DFFEA(D1_count[3]_lut_out, E1_enmin, reset, , sethour, , );

--D1L9Q is minute:inst2|count[3]~567
--operation mode is normal

D1L9Q = D1_count[3];


--D1_count[6] is minute:inst2|count[6]
--operation mode is normal

D1_count[6]_lut_out = D1L20;
D1_count[6] = DFFEA(D1_count[6]_lut_out, E1_enmin, reset, , sethour, , );

--D1L15Q is minute:inst2|count[6]~568
--operation mode is normal

D1L15Q = D1_count[6];


--A1L15 is rtl~0
--operation mode is normal

A1L15 = A1L16 & !D1_count[3] & !D1_count[0] & !D1_count[6];

--A1L20 is rtl~148
--operation mode is normal

A1L20 = A1L16 & !D1_count[3] & !D1_count[0] & !D1_count[6];


--B1_count[1] is alert:inst|count[1]
--operation mode is normal

B1_count[1]_lut_out = B1_count[1] $ B1_count[0];
B1_count[1] = DFFEA(B1_count[1]_lut_out, clk, , , , , );

--B1L10Q is alert:inst|count[1]~13
--operation mode is normal

B1L10Q = B1_count[1];


--B1_count[0] is alert:inst|count[0]
--operation mode is normal

B1_count[0]_lut_out = !B1_count[0];
B1_count[0] = DFFEA(B1_count[0]_lut_out, clk, , , , , );

--B1L8Q is alert:inst|count[0]~14
--operation mode is normal

B1L8Q = B1_count[0];


--L2_cs_buffer[2] is minute:inst2|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]
--operation mode is arithmetic

L2_cs_buffer[2] = D1_count[2] $ (L2_cout[1]);

--L2L11 is minute:inst2|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~69
--operation mode is arithmetic

L2L11 = D1_count[2] $ (L2_cout[1]);

--L2_cout[2] is minute:inst2|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[2]
--operation mode is arithmetic

L2_cout[2] = CARRY(D1_count[2] & (L2_cout[1]));


--E1_enmin is second:inst3|enmin
--operation mode is normal

E1_enmin_lut_out = E1L29;
E1_enmin = DFFEA(E1_enmin_lut_out, clk, , , reset, clk, E1L27);

--E1L30Q is second:inst3|enmin~118
--operation mode is normal

E1L30Q = E1_enmin;


--L2_cs_buffer[1] is minute:inst2|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]
--operation mode is arithmetic

L2_cs_buffer[1] = D1_count[1] $ D1_count[0];

--L2L9 is minute:inst2|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~70
--operation mode is arithmetic

L2L9 = D1_count[1] $ D1_count[0];

--L2_cout[1] is minute:inst2|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[1]
--operation mode is arithmetic

L2_cout[1] = CARRY(D1_count[1] & D1_count[0]);


--L2_cs_buffer[4] is minute:inst2|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]
--operation mode is arithmetic

L2_cs_buffer[4] = D1_count[4] $ (L2_cout[3]);

--L2L15 is minute:inst2|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~71
--operation mode is arithmetic

L2L15 = D1_count[4] $ (L2_cout[3]);

--L2_cout[4] is minute:inst2|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[4]
--operation mode is arithmetic

L2_cout[4] = CARRY(D1_count[4] & (L2_cout[3]));


--L2_cs_buffer[3] is minute:inst2|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]
--operation mode is arithmetic

L2_cs_buffer[3] = D1_count[3] $ (L2_cout[2]);

--L2L13 is minute:inst2|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]~72
--operation mode is arithmetic

L2L13 = D1_count[3] $ (L2_cout[2]);

--L2_cout[3] is minute:inst2|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[3]
--operation mode is arithmetic

L2_cout[3] = CARRY(D1_count[3] & (L2_cout[2]));


--D1_count[0] is minute:inst2|count[0]
--operation mode is normal

D1_count[0]_lut_out = D1L16 & !D1_count[0];
D1_count[0] = DFFEA(D1_count[0]_lut_out, E1_enmin, reset, , sethour, , );

--D1L3Q is minute:inst2|count[0]~569
--operation mode is normal

D1L3Q = D1_count[0];


--B1L18 is alert:inst|LessThan~27
--operation mode is normal

B1L18 = !B1_count[0] # !B1_count[1];

--B1L19 is alert:inst|LessThan~28
--operation mode is normal

B1L19 = !B1_count[0] # !B1_count[1];


--A1L17 is rtl~145
--operation mode is normal

A1L17 = D1_count[3] & D1_count[0] & !D1_count[2] & !D1_count[1];

--A1L21 is rtl~149
--operation mode is normal

A1L21 = D1_count[3] & D1_count[0] & !D1_count[2] & !D1_count[1];


--D1L16 is minute:inst2|count~554
--operation mode is normal

D1L16 = !A1L17 & (!D1_count[6] # !D1_count[5]);

--D1L21 is minute:inst2|count~570
--operation mode is normal

D1L21 = !A1L17 & (!D1_count[6] # !D1_count[5]);


--E1L27 is second:inst3|enmin~4
--operation mode is normal

E1L27 = reset & (!setmin);

--E1L31 is second:inst3|enmin~119
--operation mode is normal

E1L31 = reset & (!setmin);


--L5_cs_buffer[5] is minute:inst2|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]
--operation mode is arithmetic

L5_cs_buffer[5] = D1_count[5] $ (L5_cout[4]);

--L5L20 is minute:inst2|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]~88
--operation mode is arithmetic

L5L20 = D1_count[5] $ (L5_cout[4]);

--L5_cout[5] is minute:inst2|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[5]
--operation mode is arithmetic

L5_cout[5] = CARRY(D1_count[5] & (L5_cout[4]));


--L2_cs_buffer[5] is minute:inst2|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]
--operation mode is arithmetic

L2_cs_buffer[5] = D1_count[5] $ (L2_cout[4]);

--L2L17 is minute:inst2|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]~73
--operation mode is arithmetic

L2L17 = D1_count[5] $ (L2_cout[4]);

--L2_cout[5] is minute:inst2|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[5]
--operation mode is arithmetic

L2_cout[5] = CARRY(D1_count[5] & (L2_cout[4]));


--D1L17 is minute:inst2|count~555
--operation mode is normal

D1L17 = A1L17 & (!D1_count[5] & !D1_count[4] # !D1_count[6]);

--D1L22 is minute:inst2|count~571
--operation mode is normal

D1L22 = A1L17 & (!D1_count[5] & !D1_count[4] # !D1_count[6]);


--D1L18 is minute:inst2|count~556
--operation mode is normal

D1L18 = L5_cs_buffer[5] & (D1L17 # D1L16 & L2_cs_buffer[5]) # !L5_cs_buffer[5] & D1L16 & L2_cs_buffer[5];

--D1L23 is minute:inst2|count~572
--operation mode is normal

D1L23 = L5_cs_buffer[5] & (D1L17 # D1L16 & L2_cs_buffer[5]) # !L5_cs_buffer[5] & D1L16 & L2_cs_buffer[5];


--L5_cs_buffer[4] is minute:inst2|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]
--operation mode is arithmetic

L5_cs_buffer[4] = D1_count[4] $ (L5_cout[3]);

--L5L18 is minute:inst2|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~89
--operation mode is arithmetic

L5L18 = D1_count[4] $ (L5_cout[3]);

--L5_cout[4] is minute:inst2|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[4]
--operation mode is arithmetic

L5_cout[4] = CARRY(D1_count[4] & (L5_cout[3]));


--D1L19 is minute:inst2|count~557
--operation mode is normal

D1L19 = A1L17 & L5_cs_buffer[4] & (!D1_count[6] # !D1_count[5]);

--D1L24 is minute:inst2|count~573
--operation mode is normal

D1L24 = A1L17 & L5_cs_buffer[4] & (!D1_count[6] # !D1_count[5]);


--D1L20 is minute:inst2|count~560
--operation mode is normal

D1L20 = D1L17 & (J2_unreg_res_node[6] # D1L16 & J1_unreg_res_node[6]) # !D1L17 & D1L16 & J1_unreg_res_node[6];

--D1L25 is minute:inst2|count~574
--operation mode is normal

D1L25 = D1L17 & (J2_unreg_res_node[6] # D1L16 & J1_unreg_res_node[6]) # !D1L17 & D1L16 & J1_unreg_res_node[6];


--E1_count[4] is second:inst3|count[4]
--operation mode is normal

E1_count[4]_lut_out = E1L17 # E1L16 & L8_cs_buffer[4];
E1_count[4] = DFFEA(E1_count[4]_lut_out, clk, reset, , setmin, , );

--E1L11Q is second:inst3|count[4]~563
--operation mode is normal

E1L11Q = E1_count[4];


--E1_count[6] is second:inst3|count[6]
--operation mode is normal

E1_count[6]_lut_out = E1L19;
E1_count[6] = DFFEA(E1_count[6]_lut_out, clk, reset, , setmin, , );

--E1L15Q is second:inst3|count[6]~564
--operation mode is normal

E1L15Q = E1_count[6];


--E1_count[3] is second:inst3|count[3]
--operation mode is normal

E1_count[3]_lut_out = L8_cs_buffer[3] & E1L16;
E1_count[3] = DFFEA(E1_count[3]_lut_out, clk, reset, , setmin, , );

--E1L9Q is second:inst3|count[3]~565
--operation mode is normal

E1L9Q = E1_count[3];


--E1_count[2] is second:inst3|count[2]
--operation mode is normal

E1_count[2]_lut_out = L8_cs_buffer[2] & E1L16;
E1_count[2] = DFFEA(E1_count[2]_lut_out, clk, reset, , setmin, , );

--E1L7Q is second:inst3|count[2]~566
--operation mode is normal

E1L7Q = E1_count[2];


--E1_count[1] is second:inst3|count[1]
--operation mode is normal

E1_count[1]_lut_out = L8_cs_buffer[1] & E1L16;
E1_count[1] = DFFEA(E1_count[1]_lut_out, clk, reset, , setmin, , );

--E1L5Q is second:inst3|count[1]~567
--operation mode is normal

E1L5Q = E1_count[1];