hour.map.summary

来自「vhdl语言」· SUMMARY 代码 · 共 9 行

Analysis & Synthesis Status : Successful - Tue Oct 28 17:06:11 2008
Quartus II Version : 5.1 Build 176 10/26/2005 SJ Full Version
Revision Name : hour
Top-level Entity Name : hour
Family : FLEX10K
Total logic elements : 20
Total pins : 8
Total memory bits : 0