clock_top.fit.summary

来自「vhdl语言」· SUMMARY 代码 · 共 11 行

Fitter Status : Successful - Mon Oct 27 17:07:34 2008
Quartus II Version : 5.1 Build 176 10/26/2005 SJ Full Version
Revision Name : clock_top
Top-level Entity Name : clock_top
Family : FLEX10K
Device : EPF10K10LC84-3
Timing Models : Final
Total logic elements : 154 / 576 ( 27 % )
Total pins : 20 / 59 ( 34 % )
Total memory bits : 0 / 6,144 ( 0 % )