second.map.eqn

vhdl语言

-- Copyright (C) 1991-2005 Altera Corporation
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-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
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-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--A1L41Q is enmin~reg0
--operation mode is normal

A1L41Q_lut_out = A1L37;
A1L41Q = DFFEA(A1L41Q_lut_out, clk, , , reset, clk, A1L36);

--A1L38Q is enmin~120
--operation mode is normal

A1L38Q = A1L41Q;


--count[1] is count[1]
--operation mode is normal

count[1]_lut_out = E2_cs_buffer[1] & A1L18;
count[1] = DFFEA(count[1]_lut_out, clk, reset, , setmin, , );

--A1L6Q is count[1]~696
--operation mode is normal

A1L6Q = count[1];


--count[2] is count[2]
--operation mode is normal

count[2]_lut_out = E2_cs_buffer[2] & A1L18;
count[2] = DFFEA(count[2]_lut_out, clk, reset, , setmin, , );

--A1L8Q is count[2]~697
--operation mode is normal

A1L8Q = count[2];


--count[3] is count[3]
--operation mode is normal

count[3]_lut_out = E2_cs_buffer[3] & A1L18;
count[3] = DFFEA(count[3]_lut_out, clk, reset, , setmin, , );

--A1L10Q is count[3]~698
--operation mode is normal

A1L10Q = count[3];


--count[4] is count[4]
--operation mode is normal

count[4]_lut_out = A1L19;
count[4] = DFFEA(count[4]_lut_out, clk, reset, , setmin, , );

--A1L12Q is count[4]~699
--operation mode is normal

A1L12Q = count[4];


--count[5] is count[5]
--operation mode is normal

count[5]_lut_out = A1L20 # A1L18 & E2_cs_buffer[5];
count[5] = DFFEA(count[5]_lut_out, clk, reset, , setmin, , );

--A1L14Q is count[5]~700
--operation mode is normal

A1L14Q = count[5];


--count[6] is count[6]
--operation mode is normal

count[6]_lut_out = A1L21 # A1L18 & C1_unreg_res_node[6];
count[6] = DFFEA(count[6]_lut_out, clk, reset, , setmin, , );

--A1L16Q is count[6]~701
--operation mode is normal

A1L16Q = count[6];


--A1L36 is enmin~4
--operation mode is normal

A1L36 = reset & (!setmin);

--A1L39 is enmin~121
--operation mode is normal

A1L39 = reset & (!setmin);


--count[0] is count[0]
--operation mode is normal

count[0]_lut_out = A1L18 & !count[0];
count[0] = DFFEA(count[0]_lut_out, clk, reset, , setmin, , );

--A1L4Q is count[0]~702
--operation mode is normal

A1L4Q = count[0];


--E2_cs_buffer[1] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]
--operation mode is arithmetic

E2_cs_buffer[1] = count[1] $ count[0];

--E2L9 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~69
--operation mode is arithmetic

E2L9 = count[1] $ count[0];

--E2_cout[1] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[1]
--operation mode is arithmetic

E2_cout[1] = CARRY(count[1] & count[0]);


--E2_cs_buffer[2] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]
--operation mode is arithmetic

E2_cs_buffer[2] = count[2] $ (E2_cout[1]);

--E2L11 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~70
--operation mode is arithmetic

E2L11 = count[2] $ (E2_cout[1]);

--E2_cout[2] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[2]
--operation mode is arithmetic

E2_cout[2] = CARRY(count[2] & (E2_cout[1]));


--E2_cs_buffer[3] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]
--operation mode is arithmetic

E2_cs_buffer[3] = count[3] $ (E2_cout[2]);

--E2L13 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]~71
--operation mode is arithmetic

E2L13 = count[3] $ (E2_cout[2]);

--E2_cout[3] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[3]
--operation mode is arithmetic

E2_cout[3] = CARRY(count[3] & (E2_cout[2]));


--E2_cs_buffer[5] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]
--operation mode is arithmetic

E2_cs_buffer[5] = count[5] $ (E2_cout[4]);

--E2L17 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]~72
--operation mode is arithmetic

E2L17 = count[5] $ (E2_cout[4]);

--E2_cout[5] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[5]
--operation mode is arithmetic

E2_cout[5] = CARRY(count[5] & (E2_cout[4]));


--A1L44 is rtl~59
--operation mode is normal

A1L44 = count[0] & count[3] & !count[1] & !count[2];

--A1L45 is rtl~60
--operation mode is normal

A1L45 = count[0] & count[3] & !count[1] & !count[2];


--A1L43 is rtl~1
--operation mode is normal

A1L43 = A1L44 & count[4] & count[6] & !count[5];

--A1L46 is rtl~61
--operation mode is normal

A1L46 = A1L44 & count[4] & count[6] & !count[5];


--A1L17 is count~688
--operation mode is normal

A1L17 = A1L44 & (!count[6] # !count[5]);

--A1L22 is count~703
--operation mode is normal

A1L22 = A1L44 & (!count[6] # !count[5]);


--A1L18 is count~689
--operation mode is normal

A1L18 = !A1L44 & (!count[6] # !count[5]);

--A1L23 is count~704
--operation mode is normal

A1L23 = !A1L44 & (!count[6] # !count[5]);


--A1L37 is enmin~118
--operation mode is normal

A1L37 = A1L43 & (A1L17 # A1L41Q & !A1L18) # !A1L43 & (A1L41Q & !A1L18);

--A1L40 is enmin~122
--operation mode is normal

A1L40 = A1L43 & (A1L17 # A1L41Q & !A1L18) # !A1L43 & (A1L41Q & !A1L18);


--E2_cs_buffer[4] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]
--operation mode is arithmetic

E2_cs_buffer[4] = count[4] $ (E2_cout[3]);

--E2L15 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~73
--operation mode is arithmetic

E2L15 = count[4] $ (E2_cout[3]);

--E2_cout[4] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[4]
--operation mode is arithmetic

E2_cout[4] = CARRY(count[4] & (E2_cout[3]));


--E5_cs_buffer[4] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]
--operation mode is arithmetic

E5_cs_buffer[4] = count[4] $ (E5_cout[3]);

--E5L18 is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~88
--operation mode is arithmetic

E5L18 = count[4] $ (E5_cout[3]);

--E5_cout[4] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[4]
--operation mode is arithmetic

E5_cout[4] = CARRY(count[4] & (E5_cout[3]));


--A1L19 is count~692
--operation mode is normal

A1L19 = A1L17 & (E5_cs_buffer[4] # A1L18 & E2_cs_buffer[4]) # !A1L17 & A1L18 & E2_cs_buffer[4];

--A1L24 is count~705
--operation mode is normal

A1L24 = A1L17 & (E5_cs_buffer[4] # A1L18 & E2_cs_buffer[4]) # !A1L17 & A1L18 & E2_cs_buffer[4];


--E5_cs_buffer[5] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]
--operation mode is arithmetic

E5_cs_buffer[5] = count[5] $ (E5_cout[4]);

--E5L20 is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]~89
--operation mode is arithmetic

E5L20 = count[5] $ (E5_cout[4]);

--E5_cout[5] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[5]
--operation mode is arithmetic

E5_cout[5] = CARRY(count[5] & (E5_cout[4]));


--A1L20 is count~693
--operation mode is normal

A1L20 = A1L17 & (A1L43 $ E5_cs_buffer[5]);

--A1L25 is count~706
--operation mode is normal

A1L25 = A1L17 & (A1L43 $ E5_cs_buffer[5]);


--A1L21 is count~694
--operation mode is normal

A1L21 = A1L17 & (A1L43 $ C2_unreg_res_node[6]);

--A1L26 is count~707
--operation mode is normal

A1L26 = A1L17 & (A1L43 $ C2_unreg_res_node[6]);


--C1_unreg_res_node[6] is lpm_add_sub:add_rtl_0|addcore:adder|unreg_res_node[6]
--operation mode is normal

C1_unreg_res_node[6] = E2_cout[5] $ count[6];

--C1L3 is lpm_add_sub:add_rtl_0|addcore:adder|unreg_res_node[6]~13
--operation mode is normal

C1L3 = E2_cout[5] $ count[6];


--C2_unreg_res_node[6] is lpm_add_sub:add_rtl_1|addcore:adder|unreg_res_node[6]
--operation mode is normal

C2_unreg_res_node[6] = E5_cout[5] $ count[6];

--C2L3 is lpm_add_sub:add_rtl_1|addcore:adder|unreg_res_node[6]~13
--operation mode is normal

C2L3 = E5_cout[5] $ count[6];


--E5_cs_buffer[3] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]
--operation mode is arithmetic

E5_cs_buffer[3] = count[3] $ (E5_cout[2]);

--E5L16 is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]~90
--operation mode is arithmetic

E5L16 = count[3] $ (E5_cout[2]);

--E5_cout[3] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[3]
--operation mode is arithmetic

E5_cout[3] = CARRY(count[3] & (E5_cout[2]));


--E5_cs_buffer[2] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]
--operation mode is arithmetic

E5_cs_buffer[2] = count[2] $ (E5_cout[1]);

--E5L14 is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~91
--operation mode is arithmetic

E5L14 = count[2] $ (E5_cout[1]);

--E5_cout[2] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[2]
--operation mode is arithmetic

E5_cout[2] = CARRY(count[2] # E5_cout[1]);


--E5_cs_buffer[1] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]
--operation mode is arithmetic

E5_cs_buffer[1] = count[1] $ (E5_cout[0]);

--E5L12 is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~92
--operation mode is arithmetic

E5L12 = count[1] $ (E5_cout[0]);

--E5_cout[1] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[1]
--operation mode is arithmetic

E5_cout[1] = CARRY(count[1] # E5_cout[0]);


--E5_cs_buffer[0] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]
--operation mode is arithmetic

E5_cs_buffer[0] = count[0];

--E5L10 is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~93
--operation mode is arithmetic

E5L10 = count[0];

--E5_cout[0] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[0]
--operation mode is arithmetic

E5_cout[0] = CARRY(count[0]);


--clk is clk
--operation mode is input

clk = INPUT();


--reset is reset
--operation mode is input

reset = INPUT();


--setmin is setmin
--operation mode is input

setmin = INPUT();


--enmin is enmin
--operation mode is output

enmin = OUTPUT(A1L41Q);


--daout[0] is daout[0]
--operation mode is output

daout[0] = OUTPUT(count[0]);


--daout[1] is daout[1]
--operation mode is output

daout[1] = OUTPUT(count[1]);


--daout[2] is daout[2]
--operation mode is output

daout[2] = OUTPUT(count[2]);


--daout[3] is daout[3]
--operation mode is output

daout[3] = OUTPUT(count[3]);


--daout[4] is daout[4]
--operation mode is output

daout[4] = OUTPUT(count[4]);


--daout[5] is daout[5]
--operation mode is output

daout[5] = OUTPUT(count[5]);


--daout[6] is daout[6]
--operation mode is output

daout[6] = OUTPUT(count[6]);