tool.fit.qmsg

这是使用VHDL语言编写的密码锁程序,供大家参考

{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0}
{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Info: Design uses memory blocks. Violating setup or hold times of memory block address registers could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements" {  } {  } 0}
{ "Warning" "WFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN" "3 " "Warning: The following 3 pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" { { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "displayh\[7\] GND " "Info: Pin displayh\[7\] has GND driving its datain port" {  } { { "lock.vhd" "" { Text "E:/password_lock/lock.vhd" 8 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "displayh\[7\]" } } } } { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "" { displayh[7] } "NODE_NAME" } "" } } { "E:/password_lock/tool.fld" "" { Floorplan "E:/password_lock/tool.fld" "" "" { displayh[7] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "displayt\[7\] GND " "Info: Pin displayt\[7\] has GND driving its datain port" {  } { { "lock.vhd" "" { Text "E:/password_lock/lock.vhd" 8 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "displayt\[7\]" } } } } { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "" { displayt[7] } "NODE_NAME" } "" } } { "E:/password_lock/tool.fld" "" { Floorplan "E:/password_lock/tool.fld" "" "" { displayt[7] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "displayo\[7\] GND " "Info: Pin displayo\[7\] has GND driving its datain port" {  } { { "lock.vhd" "" { Text "E:/password_lock/lock.vhd" 8 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "displayo\[7\]" } } } } { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "" { displayo[7] } "NODE_NAME" } "" } } { "E:/password_lock/tool.fld" "" { Floorplan "E:/password_lock/tool.fld" "" "" { displayo[7] } "NODE_NAME" } }  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 1  Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Aug 16 14:47:03 2006 " "Info: Processing ended: Wed Aug 16 14:47:03 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:10 " "Info: Elapsed time: 00:00:10" {  } {  } 0}  } {  } 0}