tool.tan.qmsg

这是使用VHDL语言编写的密码锁程序,供大家参考

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk memory decoder:u1\|altsyncram:reduce_or_rtl_1\|altsyncram_b1j:auto_generated\|ram_block1a0~porta_address_reg0 register lockopen~reg0 115.51 MHz 8.657 ns Internal " "Info: Clock \"clk\" has Internal fmax of 115.51 MHz between source memory \"decoder:u1\|altsyncram:reduce_or_rtl_1\|altsyncram_b1j:auto_generated\|ram_block1a0~porta_address_reg0\" and destination register \"lockopen~reg0\" (period= 8.657 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.950 ns + Longest memory register " "Info: + Longest memory to register delay is 7.950 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns decoder:u1\|altsyncram:reduce_or_rtl_1\|altsyncram_b1j:auto_generated\|ram_block1a0~porta_address_reg0 1 MEM M4K_X33_Y19 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = M4K_X33_Y19; Fanout = 2; MEM Node = 'decoder:u1\|altsyncram:reduce_or_rtl_1\|altsyncram_b1j:auto_generated\|ram_block1a0~porta_address_reg0'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "" { decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 } "NODE_NAME" } "" } } { "db/altsyncram_b1j.tdf" "" { Text "E:/password_lock/db/altsyncram_b1j.tdf" 41 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.308 ns) 4.308 ns decoder:u1\|altsyncram:reduce_or_rtl_1\|altsyncram_b1j:auto_generated\|q_a\[1\] 2 MEM M4K_X33_Y19 2 " "Info: 2: + IC(0.000 ns) + CELL(4.308 ns) = 4.308 ns; Loc. = M4K_X33_Y19; Fanout = 2; MEM Node = 'decoder:u1\|altsyncram:reduce_or_rtl_1\|altsyncram_b1j:auto_generated\|q_a\[1\]'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "4.308 ns" { decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|q_a[1] } "NODE_NAME" } "" } } { "db/altsyncram_b1j.tdf" "" { Text "E:/password_lock/db/altsyncram_b1j.tdf" 38 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.492 ns) + CELL(0.114 ns) 5.914 ns process0~73 3 COMB LC_X35_Y15_N9 1 " "Info: 3: + IC(1.492 ns) + CELL(0.114 ns) = 5.914 ns; Loc. = LC_X35_Y15_N9; Fanout = 1; COMB Node = 'process0~73'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "1.606 ns" { decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|q_a[1] process0~73 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.428 ns) + CELL(0.590 ns) 6.932 ns process0~75 4 COMB LC_X35_Y15_N3 1 " "Info: 4: + IC(0.428 ns) + CELL(0.590 ns) = 6.932 ns; Loc. = LC_X35_Y15_N3; Fanout = 1; COMB Node = 'process0~75'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "1.018 ns" { process0~73 process0~75 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.411 ns) + CELL(0.607 ns) 7.950 ns lockopen~reg0 5 REG LC_X35_Y15_N4 2 " "Info: 5: + IC(0.411 ns) + CELL(0.607 ns) = 7.950 ns; Loc. = LC_X35_Y15_N4; Fanout = 2; REG Node = 'lockopen~reg0'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "1.018 ns" { process0~75 lockopen~reg0 } "NODE_NAME" } "" } } { "lock.vhd" "" { Text "E:/password_lock/lock.vhd" 32 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.619 ns 70.68 % " "Info: Total cell delay = 5.619 ns ( 70.68 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.331 ns 29.32 % " "Info: Total interconnect delay = 2.331 ns ( 29.32 % )" {  } {  } 0}  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "7.950 ns" { decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|q_a[1] process0~73 process0~75 lockopen~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.950 ns" { decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|q_a[1] process0~73 process0~75 lockopen~reg0 } { 0.000ns 0.000ns 1.492ns 0.428ns 0.411ns } { 0.000ns 4.308ns 0.114ns 0.590ns 0.607ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.020 ns - Smallest " "Info: - Smallest clock skew is -0.020 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 3.177 ns + Shortest register " "Info: + Shortest clock path from clock \"clk\" to destination register is 3.177 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_29 70 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 70; CLK Node = 'clk'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "" { clk } "NODE_NAME" } "" } } { "lock.vhd" "" { Text "E:/password_lock/lock.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.997 ns) + CELL(0.711 ns) 3.177 ns lockopen~reg0 2 REG LC_X35_Y15_N4 2 " "Info: 2: + IC(0.997 ns) + CELL(0.711 ns) = 3.177 ns; Loc. = LC_X35_Y15_N4; Fanout = 2; REG Node = 'lockopen~reg0'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "1.708 ns" { clk lockopen~reg0 } "NODE_NAME" } "" } } { "lock.vhd" "" { Text "E:/password_lock/lock.vhd" 32 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 68.62 % " "Info: Total cell delay = 2.180 ns ( 68.62 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.997 ns 31.38 % " "Info: Total interconnect delay = 0.997 ns ( 31.38 % )" {  } {  } 0}  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "3.177 ns" { clk lockopen~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.177 ns" { clk clk~out0 lockopen~reg0 } { 0.000ns 0.000ns 0.997ns } { 0.000ns 1.469ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 3.197 ns - Longest memory " "Info: - Longest clock path from clock \"clk\" to source memory is 3.197 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_29 70 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 70; CLK Node = 'clk'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "" { clk } "NODE_NAME" } "" } } { "lock.vhd" "" { Text "E:/password_lock/lock.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.006 ns) + CELL(0.722 ns) 3.197 ns decoder:u1\|altsyncram:reduce_or_rtl_1\|altsyncram_b1j:auto_generated\|ram_block1a0~porta_address_reg0 2 MEM M4K_X33_Y19 2 " "Info: 2: + IC(1.006 ns) + CELL(0.722 ns) = 3.197 ns; Loc. = M4K_X33_Y19; Fanout = 2; MEM Node = 'decoder:u1\|altsyncram:reduce_or_rtl_1\|altsyncram_b1j:auto_generated\|ram_block1a0~porta_address_reg0'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "1.728 ns" { clk decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 } "NODE_NAME" } "" } } { "db/altsyncram_b1j.tdf" "" { Text "E:/password_lock/db/altsyncram_b1j.tdf" 41 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.191 ns 68.53 % " "Info: Total cell delay = 2.191 ns ( 68.53 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.006 ns 31.47 % " "Info: Total interconnect delay = 1.006 ns ( 31.47 % )" {  } {  } 0}  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "3.197 ns" { clk decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.197 ns" { clk clk~out0 decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 } { 0.000ns 0.000ns 1.006ns } { 0.000ns 1.469ns 0.722ns } } }  } 0}  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "3.177 ns" { clk lockopen~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.177 ns" { clk clk~out0 lockopen~reg0 } { 0.000ns 0.000ns 0.997ns } { 0.000ns 1.469ns 0.711ns } } } { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "3.197 ns" { clk decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.197 ns" { clk clk~out0 decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 } { 0.000ns 0.000ns 1.006ns } { 0.000ns 1.469ns 0.722ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.650 ns + " "Info: + Micro clock to output delay of source is 0.650 ns" {  } { { "db/altsyncram_b1j.tdf" "" { Text "E:/password_lock/db/altsyncram_b1j.tdf" 41 2 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "lock.vhd" "" { Text "E:/password_lock/lock.vhd" 32 -1 0 } }  } 0}  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "7.950 ns" { decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|q_a[1] process0~73 process0~75 lockopen~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.950 ns" { decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|q_a[1] process0~73 process0~75 lockopen~reg0 } { 0.000ns 0.000ns 1.492ns 0.428ns 0.411ns } { 0.000ns 4.308ns 0.114ns 0.590ns 0.607ns } } } { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "3.177 ns" { clk lockopen~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.177 ns" { clk clk~out0 lockopen~reg0 } { 0.000ns 0.000ns 0.997ns } { 0.000ns 1.469ns 0.711ns } } } { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "3.197 ns" { clk decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.197 ns" { clk clk~out0 decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 } { 0.000ns 0.000ns 1.006ns } { 0.000ns 1.469ns 0.722ns } } }  } 0}
{ "Info" "ITDB_TSU_RESULT" "decoder:u0\|q0\[3\] numh\[2\] clk 11.856 ns register " "Info: tsu for register \"decoder:u0\|q0\[3\]\" (data pin = \"numh\[2\]\", clock pin = \"clk\") is 11.856 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "14.996 ns + Longest pin register " "Info: + Longest pin to register delay is 14.996 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns numh\[2\] 1 PIN PIN_144 8 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_144; Fanout = 8; PIN Node = 'numh\[2\]'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "" { numh[2] } "NODE_NAME" } "" } } { "lock.vhd" "" { Text "E:/password_lock/lock.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(7.345 ns) + CELL(0.292 ns) 9.106 ns decoder:u0\|reduce_nor~1828 2 COMB LC_X31_Y14_N6 2 " "Info: 2: + IC(7.345 ns) + CELL(0.292 ns) = 9.106 ns; Loc. = LC_X31_Y14_N6; Fanout = 2; COMB Node = 'decoder:u0\|reduce_nor~1828'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "7.637 ns" { numh[2] decoder:u0|reduce_nor~1828 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.730 ns) + CELL(0.590 ns) 10.426 ns decoder:u0\|reduce_nor~1835 3 COMB LC_X32_Y14_N6 4 " "Info: 3: + IC(0.730 ns) + CELL(0.590 ns) = 10.426 ns; Loc. = LC_X32_Y14_N6; Fanout = 4; COMB Node = 'decoder:u0\|reduce_nor~1835'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "1.320 ns" { decoder:u0|reduce_nor~1828 decoder:u0|reduce_nor~1835 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.290 ns) + CELL(0.114 ns) 11.830 ns decoder:u0\|reduce_nor~1837 4 COMB LC_X32_Y15_N6 1 " "Info: 4: + IC(1.290 ns) + CELL(0.114 ns) = 11.830 ns; Loc. = LC_X32_Y15_N6; Fanout = 1; COMB Node = 'decoder:u0\|reduce_nor~1837'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "1.404 ns" { decoder:u0|reduce_nor~1835 decoder:u0|reduce_nor~1837 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.427 ns) + CELL(0.590 ns) 12.847 ns decoder:u0\|reduce_nor~1838 5 COMB LC_X32_Y15_N0 4 " "Info: 5: + IC(0.427 ns) + CELL(0.590 ns) = 12.847 ns; Loc. = LC_X32_Y15_N0; Fanout = 4; COMB Node = 'decoder:u0\|reduce_nor~1838'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "1.017 ns" { decoder:u0|reduce_nor~1837 decoder:u0|reduce_nor~1838 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.812 ns) + CELL(0.292 ns) 13.951 ns decoder:u0\|reduce_nor~1839 6 COMB LC_X31_Y15_N4 2 " "Info: 6: + IC(0.812 ns) + CELL(0.292 ns) = 13.951 ns; Loc. = LC_X31_Y15_N4; Fanout = 2; COMB Node = 'decoder:u0\|reduce_nor~1839'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "1.104 ns" { decoder:u0|reduce_nor~1838 decoder:u0|reduce_nor~1839 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.438 ns) + CELL(0.607 ns) 14.996 ns decoder:u0\|q0\[3\] 7 REG LC_X31_Y15_N6 1 " "Info: 7: + IC(0.438 ns) + CELL(0.607 ns) = 14.996 ns; Loc. = LC_X31_Y15_N6; Fanout = 1; REG Node = 'decoder:u0\|q0\[3\]'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "1.045 ns" { decoder:u0|reduce_nor~1839 decoder:u0|q0[3] } "NODE_NAME" } "" } } { "decoder.vhd" "" { Text "E:/password_lock/decoder.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.954 ns 26.37 % " "Info: Total cell delay = 3.954 ns ( 26.37 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "11.042 ns 73.63 % " "Info: Total interconnect delay = 11.042 ns ( 73.63 % )" {  } {  } 0}  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "14.996 ns" { numh[2] decoder:u0|reduce_nor~1828 decoder:u0|reduce_nor~1835 decoder:u0|reduce_nor~1837 decoder:u0|reduce_nor~1838 decoder:u0|reduce_nor~1839 decoder:u0|q0[3] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "14.996 ns" { numh[2] numh[2]~out0 decoder:u0|reduce_nor~1828 decoder:u0|reduce_nor~1835 decoder:u0|reduce_nor~1837 decoder:u0|reduce_nor~1838 decoder:u0|reduce_nor~1839 decoder:u0|q0[3] } { 0.000ns 0.000ns 7.345ns 0.730ns 1.290ns 0.427ns 0.812ns 0.438ns } { 0.000ns 1.469ns 0.292ns 0.590ns 0.114ns 0.590ns 0.292ns 0.607ns } } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "decoder.vhd" "" { Text "E:/password_lock/decoder.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 3.177 ns - Shortest register " "Info: - Shortest clock path from clock \"clk\" to destination register is 3.177 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_29 70 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 70; CLK Node = 'clk'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "" { clk } "NODE_NAME" } "" } } { "lock.vhd" "" { Text "E:/password_lock/lock.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.997 ns) + CELL(0.711 ns) 3.177 ns decoder:u0\|q0\[3\] 2 REG LC_X31_Y15_N6 1 " "Info: 2: + IC(0.997 ns) + CELL(0.711 ns) = 3.177 ns; Loc. = LC_X31_Y15_N6; Fanout = 1; REG Node = 'decoder:u0\|q0\[3\]'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "1.708 ns" { clk decoder:u0|q0[3] } "NODE_NAME" } "" } } { "decoder.vhd" "" { Text "E:/password_lock/decoder.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 68.62 % " "Info: Total cell delay = 2.180 ns ( 68.62 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.997 ns 31.38 % " "Info: Total interconnect delay = 0.997 ns ( 31.38 % )" {  } {  } 0}  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "3.177 ns" { clk decoder:u0|q0[3] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.177 ns" { clk clk~out0 decoder:u0|q0[3] } { 0.000ns 0.000ns 0.997ns } { 0.000ns 1.469ns 0.711ns } } }  } 0}  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "14.996 ns" { numh[2] decoder:u0|reduce_nor~1828 decoder:u0|reduce_nor~1835 decoder:u0|reduce_nor~1837 decoder:u0|reduce_nor~1838 decoder:u0|reduce_nor~1839 decoder:u0|q0[3] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "14.996 ns" { numh[2] numh[2]~out0 decoder:u0|reduce_nor~1828 decoder:u0|reduce_nor~1835 decoder:u0|reduce_nor~1837 decoder:u0|reduce_nor~1838 decoder:u0|reduce_nor~1839 decoder:u0|q0[3] } { 0.000ns 0.000ns 7.345ns 0.730ns 1.290ns 0.427ns 0.812ns 0.438ns } { 0.000ns 1.469ns 0.292ns 0.590ns 0.114ns 0.590ns 0.292ns 0.607ns } } } { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "3.177 ns" { clk decoder:u0|q0[3] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.177 ns" { clk clk~out0 decoder:u0|q0[3] } { 0.000ns 0.000ns 0.997ns } { 0.000ns 1.469ns 0.711ns } } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "clk displayo\[5\] decoder:u2\|altsyncram:reduce_or_rtl_2\|altsyncram_c1j:auto_generated\|ram_block1a0~porta_address_reg0 14.036 ns memory " "Info: tco from clock \"clk\" to destination pin \"displayo\[5\]\" through memory \"decoder:u2\|altsyncram:reduce_or_rtl_2\|altsyncram_c1j:auto_generated\|ram_block1a0~porta_address_reg0\" is 14.036 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 3.188 ns + Longest memory " "Info: + Longest clock path from clock \"clk\" to source memory is 3.188 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_29 70 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 70; CLK Node = 'clk'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "" { clk } "NODE_NAME" } "" } } { "lock.vhd" "" { Text "E:/password_lock/lock.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.997 ns) + CELL(0.722 ns) 3.188 ns decoder:u2\|altsyncram:reduce_or_rtl_2\|altsyncram_c1j:auto_generated\|ram_block1a0~porta_address_reg0 2 MEM M4K_X33_Y15 2 " "Info: 2: + IC(0.997 ns) + CELL(0.722 ns) = 3.188 ns; Loc. = M4K_X33_Y15; Fanout = 2; MEM Node = 'decoder:u2\|altsyncram:reduce_or_rtl_2\|altsyncram_c1j:auto_generated\|ram_block1a0~porta_address_reg0'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "1.719 ns" { clk decoder:u2|altsyncram:reduce_or_rtl_2|altsyncram_c1j:auto_generated|ram_block1a0~porta_address_reg0 } "NODE_NAME" } "" } } { "db/altsyncram_c1j.tdf" "" { Text "E:/password_lock/db/altsyncram_c1j.tdf" 41 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.191 ns 68.73 % " "Info: Total cell delay = 2.191 ns ( 68.73 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.997 ns 31.27 % " "Info: Total interconnect delay = 0.997 ns ( 31.27 % )" {  } {  } 0}  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "3.188 ns" { clk decoder:u2|altsyncram:reduce_or_rtl_2|altsyncram_c1j:auto_generated|ram_block1a0~porta_address_reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.188 ns" { clk clk~out0 decoder:u2|altsyncram:reduce_or_rtl_2|altsyncram_c1j:auto_generated|ram_block1a0~porta_address_reg0 } { 0.000ns 0.000ns 0.997ns } { 0.000ns 1.469ns 0.722ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.650 ns + " "Info: + Micro clock to output delay of source is 0.650 ns" {  } { { "db/altsyncram_c1j.tdf" "" { Text "E:/password_lock/db/altsyncram_c1j.tdf" 41 2 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "10.198 ns + Longest memory pin " "Info: + Longest memory to pin delay is 10.198 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns decoder:u2\|altsyncram:reduce_or_rtl_2\|altsyncram_c1j:auto_generated\|ram_block1a0~porta_address_reg0 1 MEM M4K_X33_Y15 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = M4K_X33_Y15; Fanout = 2; MEM Node = 'decoder:u2\|altsyncram:reduce_or_rtl_2\|altsyncram_c1j:auto_generated\|ram_block1a0~porta_address_reg0'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "" { decoder:u2|altsyncram:reduce_or_rtl_2|altsyncram_c1j:auto_generated|ram_block1a0~porta_address_reg0 } "NODE_NAME" } "" } } { "db/altsyncram_c1j.tdf" "" { Text "E:/password_lock/db/altsyncram_c1j.tdf" 41 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.308 ns) 4.308 ns decoder:u2\|altsyncram:reduce_or_rtl_2\|altsyncram_c1j:auto_generated\|q_a\[0\] 2 MEM M4K_X33_Y15 1 " "Info: 2: + IC(0.000 ns) + CELL(4.308 ns) = 4.308 ns; Loc. = M4K_X33_Y15; Fanout = 1; MEM Node = 'decoder:u2\|altsyncram:reduce_or_rtl_2\|altsyncram_c1j:auto_generated\|q_a\[0\]'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "4.308 ns" { decoder:u2|altsyncram:reduce_or_rtl_2|altsyncram_c1j:auto_generated|ram_block1a0~porta_address_reg0 decoder:u2|altsyncram:reduce_or_rtl_2|altsyncram_c1j:auto_generated|q_a[0] } "NODE_NAME" } "" } } { "db/altsyncram_c1j.tdf" "" { Text "E:/password_lock/db/altsyncram_c1j.tdf" 38 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.766 ns) + CELL(2.124 ns) 10.198 ns displayo\[5\] 3 PIN PIN_170 0 " "Info: 3: + IC(3.766 ns) + CELL(2.124 ns) = 10.198 ns; Loc. = PIN_170; Fanout = 0; PIN Node = 'displayo\[5\]'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "5.890 ns" { decoder:u2|altsyncram:reduce_or_rtl_2|altsyncram_c1j:auto_generated|q_a[0] displayo[5] } "NODE_NAME" } "" } } { "lock.vhd" "" { Text "E:/password_lock/lock.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "6.432 ns 63.07 % " "Info: Total cell delay = 6.432 ns ( 63.07 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.766 ns 36.93 % " "Info: Total interconnect delay = 3.766 ns ( 36.93 % )" {  } {  } 0}  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "10.198 ns" { decoder:u2|altsyncram:reduce_or_rtl_2|altsyncram_c1j:auto_generated|ram_block1a0~porta_address_reg0 decoder:u2|altsyncram:reduce_or_rtl_2|altsyncram_c1j:auto_generated|q_a[0] displayo[5] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "10.198 ns" { decoder:u2|altsyncram:reduce_or_rtl_2|altsyncram_c1j:auto_generated|ram_block1a0~porta_address_reg0 decoder:u2|altsyncram:reduce_or_rtl_2|altsyncram_c1j:auto_generated|q_a[0] displayo[5] } { 0.000ns 0.000ns 3.766ns } { 0.000ns 4.308ns 2.124ns } } }  } 0}  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "3.188 ns" { clk decoder:u2|altsyncram:reduce_or_rtl_2|altsyncram_c1j:auto_generated|ram_block1a0~porta_address_reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.188 ns" { clk clk~out0 decoder:u2|altsyncram:reduce_or_rtl_2|altsyncram_c1j:auto_generated|ram_block1a0~porta_address_reg0 } { 0.000ns 0.000ns 0.997ns } { 0.000ns 1.469ns 0.722ns } } } { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "10.198 ns" { decoder:u2|altsyncram:reduce_or_rtl_2|altsyncram_c1j:auto_generated|ram_block1a0~porta_address_reg0 decoder:u2|altsyncram:reduce_or_rtl_2|altsyncram_c1j:auto_generated|q_a[0] displayo[5] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "10.198 ns" { decoder:u2|altsyncram:reduce_or_rtl_2|altsyncram_c1j:auto_generated|ram_block1a0~porta_address_reg0 decoder:u2|altsyncram:reduce_or_rtl_2|altsyncram_c1j:auto_generated|q_a[0] displayo[5] } { 0.000ns 0.000ns 3.766ns } { 0.000ns 4.308ns 2.124ns } } }  } 0}
{ "Info" "ITDB_TH_RESULT" "decoder:u1\|altsyncram:reduce_or_rtl_1\|altsyncram_b1j:auto_generated\|ram_block1a0~porta_address_reg0 numt\[0\] clk -4.678 ns memory " "Info: th for memory \"decoder:u1\|altsyncram:reduce_or_rtl_1\|altsyncram_b1j:auto_generated\|ram_block1a0~porta_address_reg0\" (data pin = \"numt\[0\]\", clock pin = \"clk\") is -4.678 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 3.197 ns + Longest memory " "Info: + Longest clock path from clock \"clk\" to destination memory is 3.197 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_29 70 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 70; CLK Node = 'clk'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "" { clk } "NODE_NAME" } "" } } { "lock.vhd" "" { Text "E:/password_lock/lock.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.006 ns) + CELL(0.722 ns) 3.197 ns decoder:u1\|altsyncram:reduce_or_rtl_1\|altsyncram_b1j:auto_generated\|ram_block1a0~porta_address_reg0 2 MEM M4K_X33_Y19 2 " "Info: 2: + IC(1.006 ns) + CELL(0.722 ns) = 3.197 ns; Loc. = M4K_X33_Y19; Fanout = 2; MEM Node = 'decoder:u1\|altsyncram:reduce_or_rtl_1\|altsyncram_b1j:auto_generated\|ram_block1a0~porta_address_reg0'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "1.728 ns" { clk decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 } "NODE_NAME" } "" } } { "db/altsyncram_b1j.tdf" "" { Text "E:/password_lock/db/altsyncram_b1j.tdf" 41 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.191 ns 68.53 % " "Info: Total cell delay = 2.191 ns ( 68.53 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.006 ns 31.47 % " "Info: Total interconnect delay = 1.006 ns ( 31.47 % )" {  } {  } 0}  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "3.197 ns" { clk decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.197 ns" { clk clk~out0 decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 } { 0.000ns 0.000ns 1.006ns } { 0.000ns 1.469ns 0.722ns } } }  } 0} { "Info" "ITDB_FULL_TH_DELAY" "0.055 ns + " "Info: + Micro hold delay of destination is 0.055 ns" {  } { { "db/altsyncram_b1j.tdf" "" { Text "E:/password_lock/db/altsyncram_b1j.tdf" 41 2 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.930 ns - Shortest pin memory " "Info: - Shortest pin to memory delay is 7.930 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.475 ns) 1.475 ns numt\[0\] 1 PIN PIN_201 8 " "Info: 1: + IC(0.000 ns) + CELL(1.475 ns) = 1.475 ns; Loc. = PIN_201; Fanout = 8; PIN Node = 'numt\[0\]'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "" { numt[0] } "NODE_NAME" } "" } } { "lock.vhd" "" { Text "E:/password_lock/lock.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(6.072 ns) + CELL(0.383 ns) 7.930 ns decoder:u1\|altsyncram:reduce_or_rtl_1\|altsyncram_b1j:auto_generated\|ram_block1a0~porta_address_reg0 2 MEM M4K_X33_Y19 2 " "Info: 2: + IC(6.072 ns) + CELL(0.383 ns) = 7.930 ns; Loc. = M4K_X33_Y19; Fanout = 2; MEM Node = 'decoder:u1\|altsyncram:reduce_or_rtl_1\|altsyncram_b1j:auto_generated\|ram_block1a0~porta_address_reg0'" {  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "6.455 ns" { numt[0] decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 } "NODE_NAME" } "" } } { "db/altsyncram_b1j.tdf" "" { Text "E:/password_lock/db/altsyncram_b1j.tdf" 41 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.858 ns 23.43 % " "Info: Total cell delay = 1.858 ns ( 23.43 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.072 ns 76.57 % " "Info: Total interconnect delay = 6.072 ns ( 76.57 % )" {  } {  } 0}  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "7.930 ns" { numt[0] decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.930 ns" { numt[0] numt[0]~out0 decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 } { 0.000ns 0.000ns 6.072ns } { 0.000ns 1.475ns 0.383ns } } }  } 0}  } { { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "3.197 ns" { clk decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.197 ns" { clk clk~out0 decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 } { 0.000ns 0.000ns 1.006ns } { 0.000ns 1.469ns 0.722ns } } } { "E:/password_lock/db/tool_cmp.qrpt" "" { Report "E:/password_lock/db/tool_cmp.qrpt" Compiler "tool" "UNKNOWN" "V1" "E:/password_lock/db/tool.quartus_db" { Floorplan "E:/password_lock/" "" "7.930 ns" { numt[0] decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.930 ns" { numt[0] numt[0]~out0 decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|ram_block1a0~porta_address_reg0 } { 0.000ns 0.000ns 6.072ns } { 0.000ns 1.475ns 0.383ns } } }  } 0}