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📄 phasea.rpt

📁 利用FPGA实现的DDS
💻 RPT
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-- Equation name is '_LC7_B7', type is buried 
_LC7_B7  = LCELL( _EQ043);
  _EQ043 =  _LC4_B7 & !_LC6_B7 &  pipe16
         #  _LC4_B7 & !_LC6_B7 &  SYNCFREQ6
         # !_LC6_B7 &  pipe16 &  SYNCFREQ6
         #  _LC6_B7 & !pipe16 & !SYNCFREQ6
         # !_LC4_B7 &  _LC6_B7 & !pipe16
         # !_LC4_B7 &  _LC6_B7 & !SYNCFREQ6;

-- Node name is '|lpm_add_sub:lpm_add_1|:147' from file "lpm_add_sub.tdf" line 704, column 56
-- Equation name is '_LC6_B7', type is buried 
_LC6_B7  = LCELL( _EQ044);
  _EQ044 = !pipe17 &  SYNCFREQ7
         #  pipe17 & !SYNCFREQ7;

-- Node name is '|lpm_add_sub:lpm_add_2|addcore:adder|pcarry0' from file "addcore.tdf" line 308, column 64
-- Equation name is '_LC3_B1', type is buried 
_LC3_B1  = LCELL( _EQ045);
  _EQ045 =  pipe20 &  SYNCFREQ8
         #  pipec1 &  pipe20
         #  pipec1 &  SYNCFREQ8;

-- Node name is '|lpm_add_sub:lpm_add_2|addcore:adder|pcarry1' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC5_B1', type is buried 
_LC5_B1  = LCELL( _EQ046);
  _EQ046 =  _LC3_B1 &  pipe21
         #  _LC3_B1 &  SYNCFREQ9
         #  pipe21 &  SYNCFREQ9;

-- Node name is '|lpm_add_sub:lpm_add_2|addcore:adder|pcarry2' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC7_B1', type is buried 
_LC7_B1  = LCELL( _EQ047);
  _EQ047 =  _LC5_B1 &  pipe22
         #  _LC5_B1 &  SYNCFREQ10
         #  pipe22 &  SYNCFREQ10;

-- Node name is '|lpm_add_sub:lpm_add_2|addcore:adder|pcarry3' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC1_B1', type is buried 
_LC1_B1  = LCELL( _EQ048);
  _EQ048 =  _LC7_B1 &  pipe23
         #  _LC7_B1 &  SYNCFREQ11
         #  pipe23 &  SYNCFREQ11;

-- Node name is '|lpm_add_sub:lpm_add_2|addcore:adder|pcarry4' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC6_A6', type is buried 
_LC6_A6  = LCELL( _EQ049);
  _EQ049 =  _LC1_B1 &  pipe24
         #  _LC1_B1 &  SYNCFREQ12
         #  pipe24 &  SYNCFREQ12;

-- Node name is '|lpm_add_sub:lpm_add_2|addcore:adder|pcarry5' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC3_A9', type is buried 
_LC3_A9  = LCELL( _EQ050);
  _EQ050 =  _LC6_A6 &  pipe25
         #  _LC6_A6 &  SYNCFREQ13
         #  pipe25 &  SYNCFREQ13;

-- Node name is '|lpm_add_sub:lpm_add_2|addcore:adder|:162' from file "addcore.tdf" line 316, column 67
-- Equation name is '_LC6_A9', type is buried 
_LC6_A9  = LCELL( _EQ051);
  _EQ051 =  _LC3_A9 & !_LC5_A9 &  pipe26
         #  _LC3_A9 & !_LC5_A9 &  SYNCFREQ14
         # !_LC5_A9 &  pipe26 &  SYNCFREQ14
         #  _LC5_A9 & !pipe26 & !SYNCFREQ14
         # !_LC3_A9 &  _LC5_A9 & !pipe26
         # !_LC3_A9 &  _LC5_A9 & !SYNCFREQ14;

-- Node name is '|lpm_add_sub:lpm_add_2|:147' from file "lpm_add_sub.tdf" line 704, column 56
-- Equation name is '_LC5_A9', type is buried 
_LC5_A9  = LCELL( _EQ052);
  _EQ052 = !pipe27 &  SYNCFREQ15
         #  pipe27 & !SYNCFREQ15;

-- Node name is '|lpm_add_sub:lpm_add_3|addcore:adder|pcarry0' from file "addcore.tdf" line 308, column 64
-- Equation name is '_LC2_A12', type is buried 
_LC2_A12 = LCELL( _EQ053);
  _EQ053 =  pipe30 &  SYNCFREQ16
         #  pipec2 &  pipe30
         #  pipec2 &  SYNCFREQ16;

-- Node name is '|lpm_add_sub:lpm_add_3|addcore:adder|pcarry1' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC5_A12', type is buried 
_LC5_A12 = LCELL( _EQ054);
  _EQ054 =  _LC2_A12 &  pipe31
         #  _LC2_A12 &  SYNCFREQ17
         #  pipe31 &  SYNCFREQ17;

-- Node name is '|lpm_add_sub:lpm_add_3|addcore:adder|pcarry2' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC7_A12', type is buried 
_LC7_A12 = LCELL( _EQ055);
  _EQ055 =  _LC5_A12 &  pipe32
         #  _LC5_A12 &  SYNCFREQ18
         #  pipe32 &  SYNCFREQ18;

-- Node name is '|lpm_add_sub:lpm_add_3|addcore:adder|pcarry3' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC4_A12', type is buried 
_LC4_A12 = LCELL( _EQ056);
  _EQ056 =  _LC7_A12 &  pipe33
         #  _LC7_A12 &  SYNCFREQ19
         #  pipe33 &  SYNCFREQ19;

-- Node name is '|lpm_add_sub:lpm_add_3|addcore:adder|pcarry4' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC2_A6', type is buried 
_LC2_A6  = LCELL( _EQ057);
  _EQ057 =  _LC4_A12 &  pipe34
         #  _LC4_A12 &  SYNCFREQ20
         #  pipe34 &  SYNCFREQ20;

-- Node name is '|lpm_add_sub:lpm_add_3|addcore:adder|pcarry5' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC2_C8', type is buried 
_LC2_C8  = LCELL( _EQ058);
  _EQ058 =  _LC2_A6 &  pipe35
         #  _LC2_A6 &  SYNCFREQ21
         #  pipe35 &  SYNCFREQ21;

-- Node name is '|lpm_add_sub:lpm_add_3|addcore:adder|:162' from file "addcore.tdf" line 316, column 67
-- Equation name is '_LC6_C8', type is buried 
_LC6_C8  = LCELL( _EQ059);
  _EQ059 =  _LC2_C8 & !_LC5_C8 &  pipe36
         #  _LC2_C8 & !_LC5_C8 &  SYNCFREQ22
         # !_LC5_C8 &  pipe36 &  SYNCFREQ22
         #  _LC5_C8 & !pipe36 & !SYNCFREQ22
         # !_LC2_C8 &  _LC5_C8 & !pipe36
         # !_LC2_C8 &  _LC5_C8 & !SYNCFREQ22;

-- Node name is '|lpm_add_sub:lpm_add_3|:147' from file "lpm_add_sub.tdf" line 704, column 56
-- Equation name is '_LC5_C8', type is buried 
_LC5_C8  = LCELL( _EQ060);
  _EQ060 = !pipe37 &  SYNCFREQ23
         #  pipe37 & !SYNCFREQ23;

-- Node name is '|lpm_add_sub:lpm_add_4|addcore:adder|pcarry0' from file "addcore.tdf" line 308, column 64
-- Equation name is '_LC4_C1', type is buried 
_LC4_C1  = LCELL( _EQ061);
  _EQ061 =  pipe40 &  SYNCFREQ24
         #  pipec3 &  pipe40
         #  pipec3 &  SYNCFREQ24;

-- Node name is '|lpm_add_sub:lpm_add_4|addcore:adder|pcarry1' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC6_C1', type is buried 
_LC6_C1  = LCELL( _EQ062);
  _EQ062 =  _LC4_C1 &  pipe41
         #  _LC4_C1 &  SYNCFREQ25
         #  pipe41 &  SYNCFREQ25;

-- Node name is '|lpm_add_sub:lpm_add_4|addcore:adder|pcarry2' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC7_C1', type is buried 
_LC7_C1  = LCELL( _EQ063);
  _EQ063 =  _LC6_C1 &  pipe42
         #  _LC6_C1 &  SYNCFREQ26
         #  pipe42 &  SYNCFREQ26;

-- Node name is '|lpm_add_sub:lpm_add_4|addcore:adder|pcarry3' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC2_C1', type is buried 
_LC2_C1  = LCELL( _EQ064);
  _EQ064 =  _LC7_C1 &  pipe43
         #  _LC7_C1 &  SYNCFREQ27
         #  pipe43 &  SYNCFREQ27;

-- Node name is '|lpm_add_sub:lpm_add_4|addcore:adder|pcarry4' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC4_A6', type is buried 
_LC4_A6  = LCELL( _EQ065);
  _EQ065 =  _LC2_C1 &  pipe44
         #  _LC2_C1 &  SYNCFREQ28
         #  pipe44 &  SYNCFREQ28;

-- Node name is '|lpm_add_sub:lpm_add_4|addcore:adder|pcarry5' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC3_B6', type is buried 
_LC3_B6  = LCELL( _EQ066);
  _EQ066 =  _LC4_A6 &  pipe45
         #  _LC4_A6 &  SYNCFREQ29
         #  pipe45 &  SYNCFREQ29;

-- Node name is '|lpm_add_sub:lpm_add_4|addcore:adder|pcarry6' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC7_B6', type is buried 
_LC7_B6  = LCELL( _EQ067);
  _EQ067 =  _LC3_B6 &  pipe46
         #  _LC3_B6 &  SYNCFREQ30
         #  pipe46 &  SYNCFREQ30;

-- Node name is ':1018' 
-- Equation name is '_LC1_B6', type is buried 
_LC1_B6  = LCELL( _EQ068);
  _EQ068 = !pipe46 &  pipe47
         #  pipe46 & !pipe47;



Project Information                                     f:\dds2\dds\phasea.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Multi-Level

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'FLEX10K' family

      CARRY_CHAIN                         = ignore
      CARRY_CHAIN_LENGTH                  = 32
      CASCADE_CHAIN                       = ignore
      CASCADE_CHAIN_LENGTH                = 2
      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SUBFACTOR_EXTRACTION                = on
      IGNORE_SOFT_BUFFERS                 = on
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic Fast I/O                  = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = off

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Use Quartus Fitter                        = on
Smart Recompile                           = off
Total Recompile                           = off

Interfaces Menu Commands
------------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:00
   Database Builder                       00:00:00
   Logic Synthesizer                      00:00:00
   Partitioner                            00:00:00
   Fitter                                 00:00:02
   Timing SNF Extractor                   00:00:00
   Assembler                              00:00:00
   --------------------------             --------
   Total Time                             00:00:02


Memory Allocated
-----------------

Peak memory allocated during compilation  = 18,829K

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