item_new2.vho

对硅微谐振式加速度计的数据采集电路开展研究工作

\u1|num_a_s[2]~I_pathsel\ <= "01100010010";
\u1|num_a[2]~I_modesel\ <= "0100001011001";
\u1|num_a[2]~I_pathsel\ <= "00000000000";
\data~553_I_modesel\ <= "1001001010101";
\data~553_I_pathsel\ <= "00000001010";
\u2|num_a_s[2]~I_modesel\ <= "1100010010110";
\u2|num_a_s[2]~I_pathsel\ <= "01100010010";
\u2|num_clk[5]~I_modesel\ <= "0100001011001";
\u2|num_clk[5]~I_pathsel\ <= "00000000000";
\data~554_I_modesel\ <= "1001001010101";
\data~554_I_pathsel\ <= "00000001110";
\data~555_I_modesel\ <= "1001001010101";
\data~555_I_pathsel\ <= "00000001110";
\data~556_I_modesel\ <= "1001001010101";
\data~556_I_pathsel\ <= "00000001110";
\u1|num_clk[10]~I_modesel\ <= "1100001010101";
\u1|num_clk[10]~I_pathsel\ <= "00000001000";
\u1|num_clk[18]~I_modesel\ <= "0001100011001";
\u1|num_clk[18]~I_pathsel\ <= "00000101011";
\u2|num_clk[13]~I_modesel\ <= "0001100011001";
\u2|num_clk[13]~I_pathsel\ <= "00000101011";
\u2|num_a[2]~I_modesel\ <= "0001100011001";
\u2|num_a[2]~I_pathsel\ <= "00000101011";
\u1|num_clk[2]~I_modesel\ <= "0001100011001";
\u1|num_clk[2]~I_pathsel\ <= "00000101011";
\bin~I_modesel\ <= "00000001";
\u1|num_a_s[3]~I_modesel\ <= "1100010010110";
\u1|num_a_s[3]~I_pathsel\ <= "01010010001";
\u1|num_a[3]~I_modesel\ <= "0100001011001";
\u1|num_a[3]~I_pathsel\ <= "00000000000";
\u2|num_a_s[3]~I_modesel\ <= "1100010010110";
\u2|num_a_s[3]~I_pathsel\ <= "01010010001";
\u2|num_clk[6]~I_modesel\ <= "0100001011001";
\u2|num_clk[6]~I_pathsel\ <= "00000000000";
\u1|num_clk[11]~I_modesel\ <= "0100001011001";
\u1|num_clk[11]~I_pathsel\ <= "00000000000";
\u1|num_clk[19]~I_modesel\ <= "0001100011001";
\u1|num_clk[19]~I_pathsel\ <= "00000101011";
\u2|num_clk[14]~I_modesel\ <= "0001100011001";
\u2|num_clk[14]~I_pathsel\ <= "00000101011";
\u1|num_clk[3]~I_modesel\ <= "0001100011001";
\u1|num_clk[3]~I_pathsel\ <= "00000101011";
\u2|num_a[3]~I_modesel\ <= "0001100011001";
\u2|num_a[3]~I_pathsel\ <= "00000101011";
\u1|num_a_s[4]~I_modesel\ <= "1100010010110";
\u1|num_a_s[4]~I_pathsel\ <= "01010010001";
\u1|num_a[4]~I_modesel\ <= "0100001011001";
\u1|num_a[4]~I_pathsel\ <= "00000000000";
\u2|num_a_s[4]~I_modesel\ <= "1100010010110";
\u2|num_a_s[4]~I_pathsel\ <= "01010010001";
\u2|num_clk[7]~I_modesel\ <= "0100001011001";
\u2|num_clk[7]~I_pathsel\ <= "00000000000";
\u1|num_clk[12]~I_modesel\ <= "0100001011001";
\u1|num_clk[12]~I_pathsel\ <= "00000000000";
\u1|num_clk[20]~I_modesel\ <= "0001100011001";
\u1|num_clk[20]~I_pathsel\ <= "00000101011";
\u2|num_clk[15]~I_modesel\ <= "0001100011001";
\u2|num_clk[15]~I_pathsel\ <= "00000101011";
\u2|num_a[4]~I_modesel\ <= "0001100011001";
\u2|num_a[4]~I_pathsel\ <= "00000101011";
\u1|num_clk[4]~I_modesel\ <= "0001100011001";
\u1|num_clk[4]~I_pathsel\ <= "00000101011";
\u1|num_a_s[5]~I_modesel\ <= "1100010010110";
\u1|num_a_s[5]~I_pathsel\ <= "01010010001";
\u1|num_a[5]~I_modesel\ <= "1100001010101";
\u1|num_a[5]~I_pathsel\ <= "00000001000";
\u2|num_a_s[5]~I_modesel\ <= "1100010010110";
\u2|num_a_s[5]~I_pathsel\ <= "01010010001";
\u2|num_clk[8]~I_modesel\ <= "0100001011001";
\u2|num_clk[8]~I_pathsel\ <= "00000000000";
\u1|num_clk[13]~I_modesel\ <= "1100001010101";
\u1|num_clk[13]~I_pathsel\ <= "00000001000";
\u2|num_clk[0]~I_modesel\ <= "0001100011001";
\u2|num_clk[0]~I_pathsel\ <= "00000101011";
\u2|num_clk[16]~I_modesel\ <= "0001100011001";
\u2|num_clk[16]~I_pathsel\ <= "00000101011";
\u1|num_clk[5]~I_modesel\ <= "0001100011001";
\u1|num_clk[5]~I_pathsel\ <= "00000101011";
\u2|num_a[5]~I_modesel\ <= "0001100011001";
\u2|num_a[5]~I_pathsel\ <= "00000101011";
\u1|num_a_s[6]~I_modesel\ <= "1100010010110";
\u1|num_a_s[6]~I_pathsel\ <= "01010010001";
\u1|num_a[6]~I_modesel\ <= "0100001011001";
\u1|num_a[6]~I_pathsel\ <= "00000000000";
\u2|num_a_s[6]~I_modesel\ <= "1100010010110";
\u2|num_a_s[6]~I_pathsel\ <= "01010010001";
\u2|num_clk[9]~I_modesel\ <= "1100001010101";
\u2|num_clk[9]~I_pathsel\ <= "00000001000";
\u1|num_clk[14]~I_modesel\ <= "1100001010101";
\u1|num_clk[14]~I_pathsel\ <= "00000001000";
\u2|num_clk[1]~I_modesel\ <= "0001100011001";
\u2|num_clk[1]~I_pathsel\ <= "00000101011";
\u2|num_clk[17]~I_modesel\ <= "0001100011001";
\u2|num_clk[17]~I_pathsel\ <= "00000101011";
\u2|num_a[6]~I_modesel\ <= "0001100011001";
\u2|num_a[6]~I_pathsel\ <= "00000101011";
\u1|num_clk[6]~I_modesel\ <= "0001100011001";
\u1|num_clk[6]~I_pathsel\ <= "00000101011";
\u1|num_a_s[7]~I_modesel\ <= "1100010010101";
\u1|num_a_s[7]~I_pathsel\ <= "00000010010";
\u1|num_a[7]~I_modesel\ <= "0100001011001";
\u1|num_a[7]~I_pathsel\ <= "00000000000";
\u2|num_a_s[7]~I_modesel\ <= "1100010010101";
\u2|num_a_s[7]~I_pathsel\ <= "00000010010";
\u2|num_clk[10]~I_modesel\ <= "1100001010101";
\u2|num_clk[10]~I_pathsel\ <= "00000001000";
\u1|num_clk[15]~I_modesel\ <= "0100001011001";
\u1|num_clk[15]~I_pathsel\ <= "00000000000";
\u2|num_clk[2]~I_modesel\ <= "0001100011001";
\u2|num_clk[2]~I_pathsel\ <= "00000101011";
\u2|num_clk[18]~I_modesel\ <= "0001100011001";
\u2|num_clk[18]~I_pathsel\ <= "00000101011";
\u1|num_clk[7]~I_modesel\ <= "0001100011001";
\u1|num_clk[7]~I_pathsel\ <= "00000101011";
\u2|num_a[7]~I_modesel\ <= "0001100011001";
\u2|num_a[7]~I_pathsel\ <= "00000101011";
\delay[0]~I_modesel\ <= "1100001010110";
\delay[0]~I_pathsel\ <= "00100000010";
\delay[1]~I_modesel\ <= "1100010010110";
\delay[1]~I_pathsel\ <= "01100010010";
\delay[2]~I_modesel\ <= "1100010010110";
\delay[2]~I_pathsel\ <= "01100010010";
\delay[3]~I_modesel\ <= "1100010010110";
\delay[3]~I_pathsel\ <= "01010010001";
\rtl~432_I_modesel\ <= "1001001010101";
\rtl~432_I_pathsel\ <= "00000001100";
\delay[4]~I_modesel\ <= "1100010010110";
\delay[4]~I_pathsel\ <= "01010010001";
\delay[5]~I_modesel\ <= "1100010010110";
\delay[5]~I_pathsel\ <= "01010010001";
\delay[6]~I_modesel\ <= "1100010010110";
\delay[6]~I_pathsel\ <= "01010010001";
\delay[7]~I_modesel\ <= "1100010010101";
\delay[7]~I_pathsel\ <= "00000010010";
\rtl~433_I_modesel\ <= "1001001010101";
\rtl~433_I_pathsel\ <= "00000001111";
\rtl~7_I_modesel\ <= "1001001010101";
\rtl~7_I_pathsel\ <= "00000001111";
\int2_v~I_modesel\ <= "1100001010101";
\int2_v~I_pathsel\ <= "00000000000";
\int1_v~I_modesel\ <= "1100001010101";
\int1_v~I_pathsel\ <= "00000000000";
\process0~0_I_modesel\ <= "1001001010101";
\process0~0_I_pathsel\ <= "00000001100";
\data[0]~I_modesel\ <= "00000010";
\data[1]~I_modesel\ <= "00000010";
\data[2]~I_modesel\ <= "00000010";
\data[3]~I_modesel\ <= "00000010";
\data[4]~I_modesel\ <= "00000010";
\data[5]~I_modesel\ <= "00000010";
\data[6]~I_modesel\ <= "00000010";
\data[7]~I_modesel\ <= "00000010";
\intermit~I_modesel\ <= "00000010";

\u1|INV_INST_p_b:lastone\ : INV
PORT MAP (
	 IN1 => \u1|p_b:lastone\,
	 Y => \u1|ALT_INV_p_b:lastone\);

\u2|INV_INST_p_b:lastone\ : INV
PORT MAP (
	 IN1 => \u2|p_b:lastone\,
	 Y => \u2|ALT_INV_p_b:lastone\);

lcell_ff_enable_asynch_arcs : AND1
PORT MAP (
	 IN1 => GND,
	 Y => lcell_ff_enable_asynch_arcs_out);

\clkin~I\ : maxii_io
-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	datain => GND,
	oe => GND,
	modesel => \clkin~I_modesel\,
	combout => \clkin~combout\,
	padio => ww_clkin);

\ain~I\ : maxii_io
-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	datain => GND,
	oe => GND,
	modesel => \ain~I_modesel\,
	combout => \ain~combout\,
	padio => ww_ain);

\sel[1]~I\ : maxii_io
-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	datain => GND,
	oe => GND,
	modesel => \sel[1]~I_modesel\,
	combout => \sel[1]~combout\,
	padio => ww_sel(1));

\sel[2]~I\ : maxii_io
-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	datain => GND,
	oe => GND,
	modesel => \sel[2]~I_modesel\,
	combout => \sel[2]~combout\,
	padio => ww_sel(2));

\rtl~431_I\ : maxii_lcell
-- Equation(s):
-- \rtl~431\ = !\sel[1]~combout\ & !\sel[2]~combout\

-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "normal",
--	synch_mode => "off",
--	register_cascade_mode => "off",
--	sum_lutc_input => "datac",
--	lut_mask => "000F",
--	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	pathsel => \rtl~431_I_pathsel\,
	enable_asynch_arcs => lcell_ff_enable_asynch_arcs_out,
	clk => GND,
	dataa => VCC,
	datab => VCC,
	datac => \sel[1]~combout\,
	datad => \sel[2]~combout\,
	aclr => GND,
	aload => GND,
	sclr => GND,
	sload => GND,
	ena => VCC,
	cin => GND,
	cin0 => GND,
	cin1 => VCC,
	inverta => GND,
	regcascin => GND,
	modesel => \rtl~431_I_modesel\,
	combout => \rtl~431\);

\sel[0]~I\ : maxii_io
-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	datain => GND,
	oe => GND,
	modesel => \sel[0]~I_modesel\,
	combout => \sel[0]~combout\,
	padio => ww_sel(0));

\u1|num_clk_s[0]~I\ : maxii_lcell
-- Equation(s):
-- \u1|num_clk_s[0]\ = DFFEAS(!\u1|num_clk_s[0]\, GLOBAL(\clkin~combout\), !GLOBAL(\u1|once\), , , , , , )
-- \u1|num_clk_s[0]~152\ = CARRY(\u1|num_clk_s[0]\)
-- \u1|num_clk_s[0]~152COUT1_249\ = CARRY(\u1|num_clk_s[0]\)

-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "arithmetic",
--	synch_mode => "off",
--	register_cascade_mode => "off",
--	sum_lutc_input => "datac",
--	lut_mask => "55AA",
--	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	pathsel => \u1|num_clk_s[0]~I_pathsel\,
	enable_asynch_arcs => lcell_ff_enable_asynch_arcs_out,
	clk => \clkin~combout\,
	dataa => \u1|num_clk_s[0]\,
	datab => VCC,
	datac => VCC,
	datad => VCC,
	aclr => \u1|once\,
	aload => GND,
	sclr => GND,
	sload => GND,
	ena => VCC,
	cin => GND,
	cin0 => GND,
	cin1 => VCC,
	inverta => GND,
	regcascin => GND,
	modesel => \u1|num_clk_s[0]~I_modesel\,
	regout => \u1|num_clk_s[0]\,
	cout0 => \u1|num_clk_s[0]~152\,
	cout1 => \u1|num_clk_s[0]~152COUT1_249\);

\u1|num_clk_s[1]~I\ : maxii_lcell
-- Equation(s):
-- \u1|num_clk_s[1]\ = DFFEAS(\u1|num_clk_s[1]\ $ (\u1|num_clk_s[0]~152\), GLOBAL(\clkin~combout\), !GLOBAL(\u1|once\), , , , , , )
-- \u1|num_clk_s[1]~160\ = CARRY(!\u1|num_clk_s[0]~152\ # !\u1|num_clk_s[1]\)
-- \u1|num_clk_s[1]~160COUT1_251\ = CARRY(!\u1|num_clk_s[0]~152COUT1_249\ # !\u1|num_clk_s[1]\)

-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "arithmetic",
--	synch_mode => "off",
--	register_cascade_mode => "off",