item_new2.vho

对硅微谐振式加速度计的数据采集电路开展研究工作

SIGNAL \u2|num_clk[7]\ : std_logic;
SIGNAL \u1|num_clk[12]\ : std_logic;
SIGNAL \data~565\ : std_logic;
SIGNAL \data~566\ : std_logic;
SIGNAL \data~567\ : std_logic;
SIGNAL \data~568\ : std_logic;
SIGNAL \u1|num_a_s[4]~73\ : std_logic;
SIGNAL \u1|num_a_s[5]\ : std_logic;
SIGNAL \u1|num_a[5]\ : std_logic;
SIGNAL \u2|num_a_s[4]~73\ : std_logic;
SIGNAL \u2|num_a_s[5]\ : std_logic;
SIGNAL \u2|num_clk[8]\ : std_logic;
SIGNAL \u1|num_clk[13]\ : std_logic;
SIGNAL \data~569\ : std_logic;
SIGNAL \data~570\ : std_logic;
SIGNAL \data~571\ : std_logic;
SIGNAL \data~572\ : std_logic;
SIGNAL \u1|num_a_s[5]~77\ : std_logic;
SIGNAL \u1|num_a_s[5]~77COUT1_102\ : std_logic;
SIGNAL \u1|num_a_s[6]\ : std_logic;
SIGNAL \u1|num_a[6]\ : std_logic;
SIGNAL \u2|num_a_s[5]~77\ : std_logic;
SIGNAL \u2|num_a_s[5]~77COUT1_102\ : std_logic;
SIGNAL \u2|num_a_s[6]\ : std_logic;
SIGNAL \u2|num_clk[9]\ : std_logic;
SIGNAL \u1|num_clk[14]\ : std_logic;
SIGNAL \data~573\ : std_logic;
SIGNAL \data~574\ : std_logic;
SIGNAL \data~575\ : std_logic;
SIGNAL \data~576\ : std_logic;
SIGNAL \u1|num_a_s[6]~81\ : std_logic;
SIGNAL \u1|num_a_s[6]~81COUT1_104\ : std_logic;
SIGNAL \u1|num_a_s[7]\ : std_logic;
SIGNAL \u1|num_a[7]\ : std_logic;
SIGNAL \u2|num_a_s[6]~81\ : std_logic;
SIGNAL \u2|num_a_s[6]~81COUT1_104\ : std_logic;
SIGNAL \u2|num_a_s[7]\ : std_logic;
SIGNAL \u2|num_clk[10]\ : std_logic;
SIGNAL \u1|num_clk[15]\ : std_logic;
SIGNAL \data~577\ : std_logic;
SIGNAL \data~578\ : std_logic;
SIGNAL \data~579\ : std_logic;
SIGNAL \data~580\ : std_logic;
SIGNAL \delay[0]\ : std_logic;
SIGNAL \delay[0]~65\ : std_logic;
SIGNAL \delay[0]~65COUT1_95\ : std_logic;
SIGNAL \delay[1]\ : std_logic;
SIGNAL \delay[1]~69\ : std_logic;
SIGNAL \delay[1]~69COUT1_97\ : std_logic;
SIGNAL \delay[2]\ : std_logic;
SIGNAL \delay[2]~57\ : std_logic;
SIGNAL \delay[2]~57COUT1_99\ : std_logic;
SIGNAL \delay[3]\ : std_logic;
SIGNAL \rtl~432\ : std_logic;
SIGNAL \delay[3]~61\ : std_logic;
SIGNAL \delay[3]~61COUT1_100\ : std_logic;
SIGNAL \delay[4]\ : std_logic;
SIGNAL \delay[4]~73\ : std_logic;
SIGNAL \delay[5]\ : std_logic;
SIGNAL \delay[5]~77\ : std_logic;
SIGNAL \delay[5]~77COUT1_102\ : std_logic;
SIGNAL \delay[6]\ : std_logic;
SIGNAL \delay[6]~81\ : std_logic;
SIGNAL \delay[6]~81COUT1_104\ : std_logic;
SIGNAL \delay[7]\ : std_logic;
SIGNAL \rtl~433\ : std_logic;
SIGNAL \rtl~7\ : std_logic;
SIGNAL int2_v : std_logic;
SIGNAL int1_v : std_logic;
SIGNAL \process0~0\ : std_logic;
SIGNAL \u1|ALT_INV_p_b:lastone\ : std_logic;
SIGNAL \u2|ALT_INV_p_b:lastone\ : std_logic;
COMPONENT maxii_lcell
PORT (
	clk : IN STD_LOGIC;
	dataa : IN STD_LOGIC;
	datab : IN STD_LOGIC;
	datac : IN STD_LOGIC;
	datad : IN STD_LOGIC;
	aclr : IN STD_LOGIC;
	aload : IN STD_LOGIC;
	sclr : IN STD_LOGIC;
	sload : IN STD_LOGIC;
	ena : IN STD_LOGIC;
	cin : IN STD_LOGIC;
	cin0 : IN STD_LOGIC;
	cin1 : IN STD_LOGIC;
	inverta : IN STD_LOGIC;
	regcascin : IN STD_LOGIC;
	combout : OUT STD_LOGIC;
	regout : OUT STD_LOGIC;
	cout : OUT STD_LOGIC;
	cout0 : OUT STD_LOGIC;
	cout1 : OUT STD_LOGIC;
	modesel : IN STD_LOGIC_VECTOR(12 DOWNTO 0);
	pathsel : IN STD_LOGIC_VECTOR(10 DOWNTO 0);
	enable_asynch_arcs : IN STD_LOGIC);
END COMPONENT;

COMPONENT maxii_io
PORT (
	datain : IN STD_LOGIC;
	oe : IN STD_LOGIC;
	combout : OUT STD_LOGIC;
	padio : INOUT STD_LOGIC;
	modesel : IN STD_LOGIC_VECTOR(7 DOWNTO 0));
END COMPONENT;


COMPONENT INV
    PORT (
	IN1 : IN std_logic;
	Y :  OUT std_logic);
END COMPONENT;

COMPONENT AND1
    PORT (
	IN1 : IN std_logic;
	Y :  OUT std_logic);
END COMPONENT;
BEGIN

ww_ain <= ain;
ww_bin <= bin;
ww_clkin <= clkin;
ww_sel <= sel;
data <= ww_data;
intermit <= ww_intermit;

gnd <= '0';
vcc <= '1';
GNDs <= (OTHERS => '0');
VCCs <= (OTHERS => '1');

\clkin~I_modesel\ <= "00000001";
\ain~I_modesel\ <= "00000001";
\sel[1]~I_modesel\ <= "00000001";
\sel[2]~I_modesel\ <= "00000001";
\rtl~431_I_modesel\ <= "1001001010101";
\rtl~431_I_pathsel\ <= "00000001100";
\sel[0]~I_modesel\ <= "00000001";
\u1|num_clk_s[0]~I_modesel\ <= "1100001010110";
\u1|num_clk_s[0]~I_pathsel\ <= "00010000001";
\u1|num_clk_s[1]~I_modesel\ <= "1100010010110";
\u1|num_clk_s[1]~I_pathsel\ <= "01010010001";
\u1|num_clk_s[2]~I_modesel\ <= "1100010010110";
\u1|num_clk_s[2]~I_pathsel\ <= "01100010010";
\u1|num_clk_s[3]~I_modesel\ <= "1100010010110";
\u1|num_clk_s[3]~I_pathsel\ <= "01010010001";
\u1|num_clk_s[4]~I_modesel\ <= "1100010010110";
\u1|num_clk_s[4]~I_pathsel\ <= "01100010010";
\u1|num_clk_s[5]~I_modesel\ <= "1100010010110";
\u1|num_clk_s[5]~I_pathsel\ <= "01100010010";
\u1|num_clk_s[6]~I_modesel\ <= "1100010010110";
\u1|num_clk_s[6]~I_pathsel\ <= "01100010010";
\u1|num_clk_s[7]~I_modesel\ <= "1100010010110";
\u1|num_clk_s[7]~I_pathsel\ <= "01100010010";
\u1|num_clk_s[8]~I_modesel\ <= "1100010010110";
\u1|num_clk_s[8]~I_pathsel\ <= "01010010001";
\u1|num_clk_s[9]~I_modesel\ <= "1100010010110";
\u1|num_clk_s[9]~I_pathsel\ <= "01010010001";
\u1|num_clk_s[10]~I_modesel\ <= "1100010010110";
\u1|num_clk_s[10]~I_pathsel\ <= "01010010001";
\u1|num_clk_s[11]~I_modesel\ <= "1100010010110";
\u1|num_clk_s[11]~I_pathsel\ <= "01010010001";
\u1|num_clk_s[12]~I_modesel\ <= "1100010010110";
\u1|num_clk_s[12]~I_pathsel\ <= "01100010010";
\u1|num_clk_s[13]~I_modesel\ <= "1100010010110";
\u1|num_clk_s[13]~I_pathsel\ <= "01010010001";
\u1|num_clk_s[14]~I_modesel\ <= "1100010010110";
\u1|num_clk_s[14]~I_pathsel\ <= "01100010010";
\rtl~439_I_modesel\ <= "1001001010101";
\rtl~439_I_pathsel\ <= "00000001111";
\u1|num_clk_s[15]~I_modesel\ <= "1100010010110";
\u1|num_clk_s[15]~I_pathsel\ <= "01100010010";
\u1|num_clk_s[16]~I_modesel\ <= "1100010010110";
\u1|num_clk_s[16]~I_pathsel\ <= "01100010010";
\rtl~434_I_modesel\ <= "1001001010101";
\rtl~434_I_pathsel\ <= "00000001111";
\u1|num_clk_s[17]~I_modesel\ <= "1100010010110";
\u1|num_clk_s[17]~I_pathsel\ <= "01100010010";
\u1|num_clk_s[18]~I_modesel\ <= "1100010010110";
\u1|num_clk_s[18]~I_pathsel\ <= "01010010001";
\rtl~435_I_modesel\ <= "1001001010101";
\rtl~435_I_pathsel\ <= "00000001111";
\u1|num_clk_s[19]~I_modesel\ <= "1100010010110";
\u1|num_clk_s[19]~I_pathsel\ <= "01010010001";
\u1|num_clk_s[20]~I_modesel\ <= "1100010010101";
\u1|num_clk_s[20]~I_pathsel\ <= "00000010001";
\rtl~437_I_modesel\ <= "1001001010101";
\rtl~437_I_pathsel\ <= "00000001111";
\rtl~436_I_modesel\ <= "1001001010101";
\rtl~436_I_pathsel\ <= "00000001111";
\rtl~438_I_modesel\ <= "1001001010101";
\rtl~438_I_pathsel\ <= "00000001111";
\rtl~8_I_modesel\ <= "1001001010101";
\rtl~8_I_pathsel\ <= "00000001110";
\u1|p_b:lastone~I_modesel\ <= "1100001010101";
\u1|p_b:lastone~I_pathsel\ <= "00000000000";
\u1|once~I_modesel\ <= "1100001010101";
\u1|once~I_pathsel\ <= "00000000000";
\u1|num_a_s[0]~I_modesel\ <= "1100001010110";
\u1|num_a_s[0]~I_pathsel\ <= "00100000010";
\u2|num_clk_s[0]~I_modesel\ <= "1100001010110";
\u2|num_clk_s[0]~I_pathsel\ <= "00010000001";
\u2|num_clk_s[1]~I_modesel\ <= "1100010010110";
\u2|num_clk_s[1]~I_pathsel\ <= "01010010001";
\u2|num_clk_s[2]~I_modesel\ <= "1100010010110";
\u2|num_clk_s[2]~I_pathsel\ <= "01100010010";
\u2|num_clk_s[3]~I_modesel\ <= "1100010010110";
\u2|num_clk_s[3]~I_pathsel\ <= "01010010001";
\u2|num_clk_s[4]~I_modesel\ <= "1100010010110";
\u2|num_clk_s[4]~I_pathsel\ <= "01100010010";
\u2|num_clk_s[5]~I_modesel\ <= "1100010010110";
\u2|num_clk_s[5]~I_pathsel\ <= "01100010010";
\u2|num_clk_s[6]~I_modesel\ <= "1100010010110";
\u2|num_clk_s[6]~I_pathsel\ <= "01100010010";
\u2|num_clk_s[7]~I_modesel\ <= "1100010010110";
\u2|num_clk_s[7]~I_pathsel\ <= "01100010010";
\u2|num_clk_s[8]~I_modesel\ <= "1100010010110";
\u2|num_clk_s[8]~I_pathsel\ <= "01010010001";
\u2|num_clk_s[9]~I_modesel\ <= "1100010010110";
\u2|num_clk_s[9]~I_pathsel\ <= "01010010001";
\u2|num_clk_s[10]~I_modesel\ <= "1100010010110";
\u2|num_clk_s[10]~I_pathsel\ <= "01010010001";
\u2|num_clk_s[11]~I_modesel\ <= "1100010010110";
\u2|num_clk_s[11]~I_pathsel\ <= "01010010001";
\u2|num_clk_s[12]~I_modesel\ <= "1100010010110";
\u2|num_clk_s[12]~I_pathsel\ <= "01100010010";
\u2|num_clk_s[13]~I_modesel\ <= "1100010010110";
\u2|num_clk_s[13]~I_pathsel\ <= "01010010001";
\u2|num_clk_s[14]~I_modesel\ <= "1100010010110";
\u2|num_clk_s[14]~I_pathsel\ <= "01100010010";
\u2|num_clk_s[15]~I_modesel\ <= "1100010010110";
\u2|num_clk_s[15]~I_pathsel\ <= "01100010010";
\u2|num_clk_s[16]~I_modesel\ <= "1100010010110";
\u2|num_clk_s[16]~I_pathsel\ <= "01100010010";
\u2|num_clk_s[17]~I_modesel\ <= "1100010010110";
\u2|num_clk_s[17]~I_pathsel\ <= "01100010010";
\u2|num_clk_s[18]~I_modesel\ <= "1100010010110";
\u2|num_clk_s[18]~I_pathsel\ <= "01010010001";
\rtl~445_I_modesel\ <= "1001001010101";
\rtl~445_I_pathsel\ <= "00000001111";
\u2|num_clk_s[19]~I_modesel\ <= "1100010010110";
\u2|num_clk_s[19]~I_pathsel\ <= "01010010001";
\u2|num_clk_s[20]~I_modesel\ <= "1100010010101";
\u2|num_clk_s[20]~I_pathsel\ <= "00000010001";
\rtl~441_I_modesel\ <= "1001001010101";
\rtl~441_I_pathsel\ <= "00000001111";
\rtl~442_I_modesel\ <= "1001001010101";
\rtl~442_I_pathsel\ <= "00000001111";
\rtl~440_I_modesel\ <= "1001001010101";
\rtl~440_I_pathsel\ <= "00000001111";
\rtl~443_I_modesel\ <= "1001001010101";
\rtl~443_I_pathsel\ <= "00000001111";
\rtl~444_I_modesel\ <= "1001001010101";
\rtl~444_I_pathsel\ <= "00000001111";
\rtl~9_I_modesel\ <= "1001001010101";
\rtl~9_I_pathsel\ <= "00000001110";
\u2|p_b:lastone~I_modesel\ <= "1100001010101";
\u2|p_b:lastone~I_pathsel\ <= "00000000000";
\u2|once~I_modesel\ <= "1100001010101";
\u2|once~I_pathsel\ <= "00000000000";
\u2|num_a_s[0]~I_modesel\ <= "1100001010110";
\u2|num_a_s[0]~I_pathsel\ <= "00100000010";
\u2|num_a[0]~I_modesel\ <= "0100001011001";
\u2|num_a[0]~I_pathsel\ <= "00000000000";
\rtl~429_I_modesel\ <= "1001001010101";
\rtl~429_I_pathsel\ <= "00000001100";
\data~541_I_modesel\ <= "1001001010101";
\data~541_I_pathsel\ <= "00000001101";
\data~542_I_modesel\ <= "1001001010101";
\data~542_I_pathsel\ <= "00000001100";
\u1|num_clk[16]~I_modesel\ <= "1100001010101";
\u1|num_clk[16]~I_pathsel\ <= "00000001000";
\rtl~430_I_modesel\ <= "1001001010101";
\rtl~430_I_pathsel\ <= "00000001100";
\u2|num_clk[19]~I_modesel\ <= "0100001011001";
\u2|num_clk[19]~I_pathsel\ <= "00000000000";
\u2|num_clk[3]~I_modesel\ <= "0001100011001";
\u2|num_clk[3]~I_pathsel\ <= "00000101011";
\u2|num_clk[11]~I_modesel\ <= "0001100011001";
\u2|num_clk[11]~I_pathsel\ <= "00000101011";
\u1|num_clk[0]~I_modesel\ <= "0001100011001";
\u1|num_clk[0]~I_pathsel\ <= "00000101011";
\u1|num_clk[8]~I_modesel\ <= "0001100011001";
\u1|num_clk[8]~I_pathsel\ <= "00000101011";
\u1|num_a[0]~I_modesel\ <= "0001100011001";
\u1|num_a[0]~I_pathsel\ <= "00000101011";
\~GND~I_modesel\ <= "1001001010101";
\~GND~I_pathsel\ <= "00000000000";
\u1|num_a_s[1]~I_modesel\ <= "1100010010110";
\u1|num_a_s[1]~I_pathsel\ <= "01100010010";
\u2|num_a_s[1]~I_modesel\ <= "1100010010110";
\u2|num_a_s[1]~I_pathsel\ <= "01100010010";
\u2|num_a[1]~I_modesel\ <= "0100001011001";
\u2|num_a[1]~I_pathsel\ <= "00000000000";
\u1|num_clk[17]~I_modesel\ <= "1100001010101";
\u1|num_clk[17]~I_pathsel\ <= "00000001000";
\u2|num_clk[20]~I_modesel\ <= "1100001010101";
\u2|num_clk[20]~I_pathsel\ <= "00000001000";
\u2|num_clk[12]~I_modesel\ <= "0001100011001";
\u2|num_clk[12]~I_pathsel\ <= "00000101011";
\u2|num_clk[4]~I_modesel\ <= "0001100011001";
\u2|num_clk[4]~I_pathsel\ <= "00000101011";
\u1|num_clk[9]~I_modesel\ <= "0001100011001";
\u1|num_clk[9]~I_pathsel\ <= "00000101011";
\u1|num_clk[1]~I_modesel\ <= "0001100011001";
\u1|num_clk[1]~I_pathsel\ <= "00000101011";
\u1|num_a[1]~I_modesel\ <= "0001100011001";
\u1|num_a[1]~I_pathsel\ <= "00000101011";
\u1|num_a_s[2]~I_modesel\ <= "1100010010110";