item_new2.vho

对硅微谐振式加速度计的数据采集电路开展研究工作

-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	dataa => \u2|num_clk_s[10]\,
	aclr => \u2|once\,
	cin => \u2|num_clk_s[9]~212\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u2|num_clk_s[10]\,
	cout0 => \u2|num_clk_s[10]~224\,
	cout1 => \u2|num_clk_s[10]~224COUT1_265\);

\u2|num_clk_s[11]~I\ : maxii_lcell
-- Equation(s):
-- \u2|num_clk_s[11]\ = DFFEAS(\u2|num_clk_s[11]\ $ ((!\u2|num_clk_s[9]~212\ & \u2|num_clk_s[10]~224\) # (\u2|num_clk_s[9]~212\ & \u2|num_clk_s[10]~224COUT1_265\)), GLOBAL(\clkin~combout\), !\u2|once\, , , , , , )
-- \u2|num_clk_s[11]~148\ = CARRY(!\u2|num_clk_s[10]~224\ # !\u2|num_clk_s[11]\)
-- \u2|num_clk_s[11]~148COUT1_267\ = CARRY(!\u2|num_clk_s[10]~224COUT1_265\ # !\u2|num_clk_s[11]\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "5A5F",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	dataa => \u2|num_clk_s[11]\,
	aclr => \u2|once\,
	cin => \u2|num_clk_s[9]~212\,
	cin0 => \u2|num_clk_s[10]~224\,
	cin1 => \u2|num_clk_s[10]~224COUT1_265\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u2|num_clk_s[11]\,
	cout0 => \u2|num_clk_s[11]~148\,
	cout1 => \u2|num_clk_s[11]~148COUT1_267\);

\u2|num_clk_s[12]~I\ : maxii_lcell
-- Equation(s):
-- \u2|num_clk_s[12]\ = DFFEAS(\u2|num_clk_s[12]\ $ !(!\u2|num_clk_s[9]~212\ & \u2|num_clk_s[11]~148\) # (\u2|num_clk_s[9]~212\ & \u2|num_clk_s[11]~148COUT1_267\), GLOBAL(\clkin~combout\), !\u2|once\, , , , , , )
-- \u2|num_clk_s[12]~164\ = CARRY(\u2|num_clk_s[12]\ & !\u2|num_clk_s[11]~148\)
-- \u2|num_clk_s[12]~164COUT1_269\ = CARRY(\u2|num_clk_s[12]\ & !\u2|num_clk_s[11]~148COUT1_267\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "C30C",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	datab => \u2|num_clk_s[12]\,
	aclr => \u2|once\,
	cin => \u2|num_clk_s[9]~212\,
	cin0 => \u2|num_clk_s[11]~148\,
	cin1 => \u2|num_clk_s[11]~148COUT1_267\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u2|num_clk_s[12]\,
	cout0 => \u2|num_clk_s[12]~164\,
	cout1 => \u2|num_clk_s[12]~164COUT1_269\);

\u2|num_clk_s[13]~I\ : maxii_lcell
-- Equation(s):
-- \u2|num_clk_s[13]\ = DFFEAS(\u2|num_clk_s[13]\ $ ((!\u2|num_clk_s[9]~212\ & \u2|num_clk_s[12]~164\) # (\u2|num_clk_s[9]~212\ & \u2|num_clk_s[12]~164COUT1_269\)), GLOBAL(\clkin~combout\), !\u2|once\, , , , , , )
-- \u2|num_clk_s[13]~172\ = CARRY(!\u2|num_clk_s[12]~164\ # !\u2|num_clk_s[13]\)
-- \u2|num_clk_s[13]~172COUT1_271\ = CARRY(!\u2|num_clk_s[12]~164COUT1_269\ # !\u2|num_clk_s[13]\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "5A5F",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	dataa => \u2|num_clk_s[13]\,
	aclr => \u2|once\,
	cin => \u2|num_clk_s[9]~212\,
	cin0 => \u2|num_clk_s[12]~164\,
	cin1 => \u2|num_clk_s[12]~164COUT1_269\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u2|num_clk_s[13]\,
	cout0 => \u2|num_clk_s[13]~172\,
	cout1 => \u2|num_clk_s[13]~172COUT1_271\);

\u2|num_clk_s[14]~I\ : maxii_lcell
-- Equation(s):
-- \u2|num_clk_s[14]\ = DFFEAS(\u2|num_clk_s[14]\ $ !(!\u2|num_clk_s[9]~212\ & \u2|num_clk_s[13]~172\) # (\u2|num_clk_s[9]~212\ & \u2|num_clk_s[13]~172COUT1_271\), GLOBAL(\clkin~combout\), !\u2|once\, , , , , , )
-- \u2|num_clk_s[14]~180\ = CARRY(\u2|num_clk_s[14]\ & !\u2|num_clk_s[13]~172COUT1_271\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "C30C",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	datab => \u2|num_clk_s[14]\,
	aclr => \u2|once\,
	cin => \u2|num_clk_s[9]~212\,
	cin0 => \u2|num_clk_s[13]~172\,
	cin1 => \u2|num_clk_s[13]~172COUT1_271\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u2|num_clk_s[14]\,
	cout => \u2|num_clk_s[14]~180\);

\u2|num_clk_s[15]~I\ : maxii_lcell
-- Equation(s):
-- \u2|num_clk_s[15]\ = DFFEAS(\u2|num_clk_s[15]\ $ \u2|num_clk_s[14]~180\, GLOBAL(\clkin~combout\), !\u2|once\, , , , , , )
-- \u2|num_clk_s[15]~188\ = CARRY(!\u2|num_clk_s[14]~180\ # !\u2|num_clk_s[15]\)
-- \u2|num_clk_s[15]~188COUT1_273\ = CARRY(!\u2|num_clk_s[14]~180\ # !\u2|num_clk_s[15]\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "3C3F",
	cin_used => "true",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	datab => \u2|num_clk_s[15]\,
	aclr => \u2|once\,
	cin => \u2|num_clk_s[14]~180\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u2|num_clk_s[15]\,
	cout0 => \u2|num_clk_s[15]~188\,
	cout1 => \u2|num_clk_s[15]~188COUT1_273\);

\u2|num_clk_s[16]~I\ : maxii_lcell
-- Equation(s):
-- \u2|num_clk_s[16]\ = DFFEAS(\u2|num_clk_s[16]\ $ !(!\u2|num_clk_s[14]~180\ & \u2|num_clk_s[15]~188\) # (\u2|num_clk_s[14]~180\ & \u2|num_clk_s[15]~188COUT1_273\), GLOBAL(\clkin~combout\), !\u2|once\, , , , , , )
-- \u2|num_clk_s[16]~196\ = CARRY(\u2|num_clk_s[16]\ & !\u2|num_clk_s[15]~188\)
-- \u2|num_clk_s[16]~196COUT1_275\ = CARRY(\u2|num_clk_s[16]\ & !\u2|num_clk_s[15]~188COUT1_273\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "C30C",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	datab => \u2|num_clk_s[16]\,
	aclr => \u2|once\,
	cin => \u2|num_clk_s[14]~180\,
	cin0 => \u2|num_clk_s[15]~188\,
	cin1 => \u2|num_clk_s[15]~188COUT1_273\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u2|num_clk_s[16]\,
	cout0 => \u2|num_clk_s[16]~196\,
	cout1 => \u2|num_clk_s[16]~196COUT1_275\);

\u2|num_clk_s[17]~I\ : maxii_lcell
-- Equation(s):
-- \u2|num_clk_s[17]\ = DFFEAS(\u2|num_clk_s[17]\ $ (!\u2|num_clk_s[14]~180\ & \u2|num_clk_s[16]~196\) # (\u2|num_clk_s[14]~180\ & \u2|num_clk_s[16]~196COUT1_275\), GLOBAL(\clkin~combout\), !\u2|once\, , , , , , )
-- \u2|num_clk_s[17]~208\ = CARRY(!\u2|num_clk_s[16]~196\ # !\u2|num_clk_s[17]\)
-- \u2|num_clk_s[17]~208COUT1_277\ = CARRY(!\u2|num_clk_s[16]~196COUT1_275\ # !\u2|num_clk_s[17]\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "3C3F",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	datab => \u2|num_clk_s[17]\,
	aclr => \u2|once\,
	cin => \u2|num_clk_s[14]~180\,
	cin0 => \u2|num_clk_s[16]~196\,
	cin1 => \u2|num_clk_s[16]~196COUT1_275\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u2|num_clk_s[17]\,
	cout0 => \u2|num_clk_s[17]~208\,
	cout1 => \u2|num_clk_s[17]~208COUT1_277\);

\u2|num_clk_s[18]~I\ : maxii_lcell
-- Equation(s):
-- \u2|num_clk_s[18]\ = DFFEAS(\u2|num_clk_s[18]\ $ (!(!\u2|num_clk_s[14]~180\ & \u2|num_clk_s[17]~208\) # (\u2|num_clk_s[14]~180\ & \u2|num_clk_s[17]~208COUT1_277\)), GLOBAL(\clkin~combout\), !\u2|once\, , , , , , )
-- \u2|num_clk_s[18]~220\ = CARRY(\u2|num_clk_s[18]\ & (!\u2|num_clk_s[17]~208\))
-- \u2|num_clk_s[18]~220COUT1_279\ = CARRY(\u2|num_clk_s[18]\ & (!\u2|num_clk_s[17]~208COUT1_277\))

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "A50A",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	dataa => \u2|num_clk_s[18]\,
	aclr => \u2|once\,
	cin => \u2|num_clk_s[14]~180\,
	cin0 => \u2|num_clk_s[17]~208\,
	cin1 => \u2|num_clk_s[17]~208COUT1_277\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u2|num_clk_s[18]\,
	cout0 => \u2|num_clk_s[18]~220\,
	cout1 => \u2|num_clk_s[18]~220COUT1_279\);

\rtl~445_I\ : maxii_lcell
-- Equation(s):
-- \rtl~445\ = \u2|num_clk_s[10]\ & \u2|num_clk_s[1]\ & \u2|num_clk_s[9]\ & !\u2|num_clk_s[18]\

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0080",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => \u2|num_clk_s[10]\,
	datab => \u2|num_clk_s[1]\,
	datac => \u2|num_clk_s[9]\,
	datad => \u2|num_clk_s[18]\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \rtl~445\);

\u2|num_clk_s[19]~I\ : maxii_lcell
-- Equation(s):
-- \u2|num_clk_s[19]\ = DFFEAS(\u2|num_clk_s[19]\ $ ((!\u2|num_clk_s[14]~180\ & \u2|num_clk_s[18]~220\) # (\u2|num_clk_s[14]~180\ & \u2|num_clk_s[18]~220COUT1_279\)), GLOBAL(\clkin~combout\), !\u2|once\, , , , , , )
-- \u2|num_clk_s[19]~156\ = CARRY(!\u2|num_clk_s[18]~220COUT1_279\ # !\u2|num_clk_s[19]\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "5A5F",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	dataa => \u2|num_clk_s[19]\,
	aclr => \u2|once\,
	cin => \u2|num_clk_s[14]~180\,
	cin0 => \u2|num_clk_s[18]~220\,
	cin1 => \u2|num_clk_s[18]~220COUT1_279\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u2|num_clk_s[19]\,
	cout => \u2|num_clk_s[19]~156\);

\u2|num_clk_s[20]~I\ : maxii_lcell
-- Equation(s):
-- \u2|num_clk_s[20]\ = DFFEAS(\u2|num_clk_s[20]\ $ (!\u2|num_clk_s[19]~156\), GLOBAL(\clkin~combout\), !\u2|once\, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "A5A5",
	cin_used => "true",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	dataa => \u2|num_clk_s[20]\,
	aclr => \u2|once\,
	cin => \u2|num_clk_s[19]~156\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u2|num_clk_s[20]\);

\rtl~441_I\ : maxii_lcell
-- Equation(s):
-- \rtl~441\ = \u2|num_clk_s[5]\ & !\u2|num_clk_s[13]\ & \u2|num_clk_s[20]\ & \u2|num_clk_s[12]\

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "2000",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => \u2|num_clk_s[5]\,
	datab => \u2|num_clk_s[13]\,
	datac => \u2|num_clk_s[20]\,
	datad => \u2|num_clk_s[12]\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \rtl~441\);

\rtl~442_I\ : maxii_lcell
-- Equation(s):
-- \rtl~442\ = !\u2|num_clk_s[6]\ & !\u2|num_clk_s[15]\ & !\u2|num_clk_s[14]\ & \u2|num_clk_s[7]\

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0100",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => \u2|num_clk_s[6]\,
	datab => \u2|num_clk_s[15]\,
	datac => \u2|num_clk_s[14]\,
	datad => \u2|num_clk_s[7]\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \rtl~442\);

\rtl~440_I\ : maxii_lcell
-- Equation(s):
-- \rtl~440\ = \u2|num_clk_s[4]\ & !\u2|num_clk_s[3]\ & !\u2|num_clk_s[19]\ & !\u2|num_clk_s[11]\

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0002",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => \u2|num_clk_s[4]\,
	datab => \u2|num_clk_s[3]\,
	datac => \u2|num_clk_s[19]\,
	datad => \u2|num_clk_s[11]\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \rtl~440\);

\rtl~443_I\ : maxii_lcell
-- Equation(s):
-- \rtl~443\ = \u2|num_clk_s[8]\ & !\u2|num_clk_s[16