item_new2.vho

对硅微谐振式加速度计的数据采集电路开展研究工作

	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u1|num_clk_s[11]\,
	cout0 => \u1|num_clk_s[11]~192\,
	cout1 => \u1|num_clk_s[11]~192COUT1_267\);

\u1|num_clk_s[12]~I\ : maxii_lcell
-- Equation(s):
-- \u1|num_clk_s[12]\ = DFFEAS(\u1|num_clk_s[12]\ $ !(!\u1|num_clk_s[9]~164\ & \u1|num_clk_s[11]~192\) # (\u1|num_clk_s[9]~164\ & \u1|num_clk_s[11]~192COUT1_267\), GLOBAL(\clkin~combout\), !GLOBAL(\u1|once\), , , , , , )
-- \u1|num_clk_s[12]~204\ = CARRY(\u1|num_clk_s[12]\ & !\u1|num_clk_s[11]~192\)
-- \u1|num_clk_s[12]~204COUT1_269\ = CARRY(\u1|num_clk_s[12]\ & !\u1|num_clk_s[11]~192COUT1_267\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "C30C",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	datab => \u1|num_clk_s[12]\,
	aclr => \u1|once\,
	cin => \u1|num_clk_s[9]~164\,
	cin0 => \u1|num_clk_s[11]~192\,
	cin1 => \u1|num_clk_s[11]~192COUT1_267\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u1|num_clk_s[12]\,
	cout0 => \u1|num_clk_s[12]~204\,
	cout1 => \u1|num_clk_s[12]~204COUT1_269\);

\u1|num_clk_s[13]~I\ : maxii_lcell
-- Equation(s):
-- \u1|num_clk_s[13]\ = DFFEAS(\u1|num_clk_s[13]\ $ ((!\u1|num_clk_s[9]~164\ & \u1|num_clk_s[12]~204\) # (\u1|num_clk_s[9]~164\ & \u1|num_clk_s[12]~204COUT1_269\)), GLOBAL(\clkin~combout\), !GLOBAL(\u1|once\), , , , , , )
-- \u1|num_clk_s[13]~212\ = CARRY(!\u1|num_clk_s[12]~204\ # !\u1|num_clk_s[13]\)
-- \u1|num_clk_s[13]~212COUT1_271\ = CARRY(!\u1|num_clk_s[12]~204COUT1_269\ # !\u1|num_clk_s[13]\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "5A5F",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	dataa => \u1|num_clk_s[13]\,
	aclr => \u1|once\,
	cin => \u1|num_clk_s[9]~164\,
	cin0 => \u1|num_clk_s[12]~204\,
	cin1 => \u1|num_clk_s[12]~204COUT1_269\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u1|num_clk_s[13]\,
	cout0 => \u1|num_clk_s[13]~212\,
	cout1 => \u1|num_clk_s[13]~212COUT1_271\);

\u1|num_clk_s[14]~I\ : maxii_lcell
-- Equation(s):
-- \u1|num_clk_s[14]\ = DFFEAS(\u1|num_clk_s[14]\ $ !(!\u1|num_clk_s[9]~164\ & \u1|num_clk_s[13]~212\) # (\u1|num_clk_s[9]~164\ & \u1|num_clk_s[13]~212COUT1_271\), GLOBAL(\clkin~combout\), !GLOBAL(\u1|once\), , , , , , )
-- \u1|num_clk_s[14]~220\ = CARRY(\u1|num_clk_s[14]\ & !\u1|num_clk_s[13]~212COUT1_271\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "C30C",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	datab => \u1|num_clk_s[14]\,
	aclr => \u1|once\,
	cin => \u1|num_clk_s[9]~164\,
	cin0 => \u1|num_clk_s[13]~212\,
	cin1 => \u1|num_clk_s[13]~212COUT1_271\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u1|num_clk_s[14]\,
	cout => \u1|num_clk_s[14]~220\);

\rtl~439_I\ : maxii_lcell
-- Equation(s):
-- \rtl~439\ = \u1|num_clk_s[7]\ & !\u1|num_clk_s[13]\ & !\u1|num_clk_s[6]\ & !\u1|num_clk_s[14]\

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0002",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => \u1|num_clk_s[7]\,
	datab => \u1|num_clk_s[13]\,
	datac => \u1|num_clk_s[6]\,
	datad => \u1|num_clk_s[14]\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \rtl~439\);

\u1|num_clk_s[15]~I\ : maxii_lcell
-- Equation(s):
-- \u1|num_clk_s[15]\ = DFFEAS(\u1|num_clk_s[15]\ $ \u1|num_clk_s[14]~220\, GLOBAL(\clkin~combout\), !GLOBAL(\u1|once\), , , , , , )
-- \u1|num_clk_s[15]~228\ = CARRY(!\u1|num_clk_s[14]~220\ # !\u1|num_clk_s[15]\)
-- \u1|num_clk_s[15]~228COUT1_273\ = CARRY(!\u1|num_clk_s[14]~220\ # !\u1|num_clk_s[15]\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "3C3F",
	cin_used => "true",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	datab => \u1|num_clk_s[15]\,
	aclr => \u1|once\,
	cin => \u1|num_clk_s[14]~220\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u1|num_clk_s[15]\,
	cout0 => \u1|num_clk_s[15]~228\,
	cout1 => \u1|num_clk_s[15]~228COUT1_273\);

\u1|num_clk_s[16]~I\ : maxii_lcell
-- Equation(s):
-- \u1|num_clk_s[16]\ = DFFEAS(\u1|num_clk_s[16]\ $ !(!\u1|num_clk_s[14]~220\ & \u1|num_clk_s[15]~228\) # (\u1|num_clk_s[14]~220\ & \u1|num_clk_s[15]~228COUT1_273\), GLOBAL(\clkin~combout\), !GLOBAL(\u1|once\), , , , , , )
-- \u1|num_clk_s[16]~156\ = CARRY(\u1|num_clk_s[16]\ & !\u1|num_clk_s[15]~228\)
-- \u1|num_clk_s[16]~156COUT1_275\ = CARRY(\u1|num_clk_s[16]\ & !\u1|num_clk_s[15]~228COUT1_273\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "C30C",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	datab => \u1|num_clk_s[16]\,
	aclr => \u1|once\,
	cin => \u1|num_clk_s[14]~220\,
	cin0 => \u1|num_clk_s[15]~228\,
	cin1 => \u1|num_clk_s[15]~228COUT1_273\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u1|num_clk_s[16]\,
	cout0 => \u1|num_clk_s[16]~156\,
	cout1 => \u1|num_clk_s[16]~156COUT1_275\);

\rtl~434_I\ : maxii_lcell
-- Equation(s):
-- \rtl~434\ = \u1|num_clk_s[1]\ & \u1|num_clk_s[8]\ & !\u1|num_clk_s[0]\ & !\u1|num_clk_s[16]\

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0008",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => \u1|num_clk_s[1]\,
	datab => \u1|num_clk_s[8]\,
	datac => \u1|num_clk_s[0]\,
	datad => \u1|num_clk_s[16]\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \rtl~434\);

\u1|num_clk_s[17]~I\ : maxii_lcell
-- Equation(s):
-- \u1|num_clk_s[17]\ = DFFEAS(\u1|num_clk_s[17]\ $ (!\u1|num_clk_s[14]~220\ & \u1|num_clk_s[16]~156\) # (\u1|num_clk_s[14]~220\ & \u1|num_clk_s[16]~156COUT1_275\), GLOBAL(\clkin~combout\), !GLOBAL(\u1|once\), , , , , , )
-- \u1|num_clk_s[17]~168\ = CARRY(!\u1|num_clk_s[16]~156\ # !\u1|num_clk_s[17]\)
-- \u1|num_clk_s[17]~168COUT1_277\ = CARRY(!\u1|num_clk_s[16]~156COUT1_275\ # !\u1|num_clk_s[17]\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "3C3F",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	datab => \u1|num_clk_s[17]\,
	aclr => \u1|once\,
	cin => \u1|num_clk_s[14]~220\,
	cin0 => \u1|num_clk_s[16]~156\,
	cin1 => \u1|num_clk_s[16]~156COUT1_275\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u1|num_clk_s[17]\,
	cout0 => \u1|num_clk_s[17]~168\,
	cout1 => \u1|num_clk_s[17]~168COUT1_277\);

\u1|num_clk_s[18]~I\ : maxii_lcell
-- Equation(s):
-- \u1|num_clk_s[18]\ = DFFEAS(\u1|num_clk_s[18]\ $ (!(!\u1|num_clk_s[14]~220\ & \u1|num_clk_s[17]~168\) # (\u1|num_clk_s[14]~220\ & \u1|num_clk_s[17]~168COUT1_277\)), GLOBAL(\clkin~combout\), !GLOBAL(\u1|once\), , , , , , )
-- \u1|num_clk_s[18]~176\ = CARRY(\u1|num_clk_s[18]\ & (!\u1|num_clk_s[17]~168\))
-- \u1|num_clk_s[18]~176COUT1_279\ = CARRY(\u1|num_clk_s[18]\ & (!\u1|num_clk_s[17]~168COUT1_277\))

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "A50A",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	dataa => \u1|num_clk_s[18]\,
	aclr => \u1|once\,
	cin => \u1|num_clk_s[14]~220\,
	cin0 => \u1|num_clk_s[17]~168\,
	cin1 => \u1|num_clk_s[17]~168COUT1_277\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u1|num_clk_s[18]\,
	cout0 => \u1|num_clk_s[18]~176\,
	cout1 => \u1|num_clk_s[18]~176COUT1_279\);

\rtl~435_I\ : maxii_lcell
-- Equation(s):
-- \rtl~435\ = !\u1|num_clk_s[18]\ & \u1|num_clk_s[9]\ & !\u1|num_clk_s[2]\ & \u1|num_clk_s[17]\

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0400",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => \u1|num_clk_s[18]\,
	datab => \u1|num_clk_s[9]\,
	datac => \u1|num_clk_s[2]\,
	datad => \u1|num_clk_s[17]\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \rtl~435\);

\u1|num_clk_s[19]~I\ : maxii_lcell
-- Equation(s):
-- \u1|num_clk_s[19]\ = DFFEAS(\u1|num_clk_s[19]\ $ ((!\u1|num_clk_s[14]~220\ & \u1|num_clk_s[18]~176\) # (\u1|num_clk_s[14]~220\ & \u1|num_clk_s[18]~176COUT1_279\)), GLOBAL(\clkin~combout\), !GLOBAL(\u1|once\), , , , , , )
-- \u1|num_clk_s[19]~188\ = CARRY(!\u1|num_clk_s[18]~176COUT1_279\ # !\u1|num_clk_s[19]\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "5A5F",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	dataa => \u1|num_clk_s[19]\,
	aclr => \u1|once\,
	cin => \u1|num_clk_s[14]~220\,
	cin0 => \u1|num_clk_s[18]~176\,
	cin1 => \u1|num_clk_s[18]~176COUT1_279\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u1|num_clk_s[19]\,
	cout => \u1|num_clk_s[19]~188\);

\u1|num_clk_s[20]~I\ : maxii_lcell
-- Equation(s):
-- \u1|num_clk_s[20]\ = DFFEAS(\u1|num_clk_s[20]\ $ (!\u1|num_clk_s[19]~188\), GLOBAL(\clkin~combout\), !GLOBAL(\u1|once\), , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "A5A5",
	cin_used => "true",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clkin~combout\,
	dataa => \u1|num_clk_s[20]\,
	aclr => \u1|once\,
	cin => \u1|num_clk_s[19]~188\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \u1|num_clk_s[20]\);

\rtl~437_I\ : maxii_lcell
-- Equation(s):
-- \rtl~437\ = \u1|num_clk_s[5]\ & \u1|num_clk_s[4]\ & \u1|num_clk_s[20]\ & \u1|num_clk_s[12]\

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "8000",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => \u1|num_clk_s[5]\,
	datab => \u1|num_clk_s[4]\,
	datac => \u1|num_clk_s[20]\,
	datad => \u1|num_clk_s[12]\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \rtl~437\);

\rtl~436_I\ : maxii_lcell
-- Equation(s):
-- \rtl~436\ = \u1|num_clk_s[10]\ & !\u1|num_clk_s[3]\ & !\u1|num_clk_s[11]\ & !\u1|num_clk_s[19]\

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0002",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => \u1|num_clk_s[10]\,
	datab => \u1|num_clk_s[3]\,
	datac => \u1|num_clk_s[11]\,
	datad => \u1|num_clk_s[19]\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \rtl~436\);

\rtl~438_I\ : maxii_lcell
-- Equation(s):
-- \rtl~438\ = \rtl~434\ & \rtl~435\ & \rtl~437\ & \rtl~436\

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "8000",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => \rtl~434\,
	datab => \rtl~435\,
	datac => \rtl~437\,
	datad => \rtl~436\,