item_new2.map.eqn

对硅微谐振式加速度计的数据采集电路开展研究工作

--B1L69 is itemnew3_2:u2|num_clk_s[9]~212
--operation mode is arithmetic

B1L69 = CARRY(!B1L67 # !B1_num_clk_s[9]);


--B1_num_clk_s[1] is itemnew3_2:u2|num_clk_s[1]
--operation mode is arithmetic

B1_num_clk_s[1]_carry_eqn = B1L51;
B1_num_clk_s[1]_lut_out = B1_num_clk_s[1] $ (B1_num_clk_s[1]_carry_eqn);
B1_num_clk_s[1] = DFFEAS(B1_num_clk_s[1]_lut_out, clkin, !B1_once, , , , , , );

--B1L53 is itemnew3_2:u2|num_clk_s[1]~216
--operation mode is arithmetic

B1L53 = CARRY(!B1L51 # !B1_num_clk_s[1]);


--B2_num_clk_s[14] is itemnew3_2:u1|num_clk_s[14]
--operation mode is arithmetic

B2_num_clk_s[14]_carry_eqn = B2L77;
B2_num_clk_s[14]_lut_out = B2_num_clk_s[14] $ (!B2_num_clk_s[14]_carry_eqn);
B2_num_clk_s[14] = DFFEAS(B2_num_clk_s[14]_lut_out, clkin, !B2_once, , , , , , );

--B2L79 is itemnew3_2:u1|num_clk_s[14]~220
--operation mode is arithmetic

B2L79 = CARRY(B2_num_clk_s[14] & (!B2L77));


--B2_num_a_s[6] is itemnew3_2:u1|num_a_s[6]
--operation mode is arithmetic

B2_num_a_s[6]_carry_eqn = B2L23;
B2_num_a_s[6]_lut_out = B2_num_a_s[6] $ (!B2_num_a_s[6]_carry_eqn);
B2_num_a_s[6] = DFFEAS(B2_num_a_s[6]_lut_out, ain, VCC, , , ~GND, B2_once, , );

--B2L25 is itemnew3_2:u1|num_a_s[6]~81
--operation mode is arithmetic

B2L25 = CARRY(B2_num_a_s[6] & (!B2L23));


--B1_num_a_s[7] is itemnew3_2:u2|num_a_s[7]
--operation mode is normal

B1_num_a_s[7]_carry_eqn = B1L25;
B1_num_a_s[7]_lut_out = B1_num_a_s[7] $ (B1_num_a_s[7]_carry_eqn);
B1_num_a_s[7] = DFFEAS(B1_num_a_s[7]_lut_out, bin, VCC, , , ~GND, B1_once, , );


--B2_num_clk_s[7] is itemnew3_2:u1|num_clk_s[7]
--operation mode is arithmetic

B2_num_clk_s[7]_carry_eqn = B2L63;
B2_num_clk_s[7]_lut_out = B2_num_clk_s[7] $ (B2_num_clk_s[7]_carry_eqn);
B2_num_clk_s[7] = DFFEAS(B2_num_clk_s[7]_lut_out, clkin, !B2_once, , , , , , );

--B2L65 is itemnew3_2:u1|num_clk_s[7]~224
--operation mode is arithmetic

B2L65 = CARRY(!B2L63 # !B2_num_clk_s[7]);


--B1_num_clk_s[18] is itemnew3_2:u2|num_clk_s[18]
--operation mode is arithmetic

B1_num_clk_s[18]_carry_eqn = B1L85;
B1_num_clk_s[18]_lut_out = B1_num_clk_s[18] $ (!B1_num_clk_s[18]_carry_eqn);
B1_num_clk_s[18] = DFFEAS(B1_num_clk_s[18]_lut_out, clkin, !B1_once, , , , , , );

--B1L87 is itemnew3_2:u2|num_clk_s[18]~220
--operation mode is arithmetic

B1L87 = CARRY(B1_num_clk_s[18] & (!B1L85));


--B1_num_clk_s[10] is itemnew3_2:u2|num_clk_s[10]
--operation mode is arithmetic

B1_num_clk_s[10]_carry_eqn = B1L69;
B1_num_clk_s[10]_lut_out = B1_num_clk_s[10] $ (!B1_num_clk_s[10]_carry_eqn);
B1_num_clk_s[10] = DFFEAS(B1_num_clk_s[10]_lut_out, clkin, !B1_once, , , , , , );

--B1L71 is itemnew3_2:u2|num_clk_s[10]~224
--operation mode is arithmetic

B1L71 = CARRY(B1_num_clk_s[10] & (!B1L69));


--B1_num_clk_s[2] is itemnew3_2:u2|num_clk_s[2]
--operation mode is arithmetic

B1_num_clk_s[2]_carry_eqn = B1L53;
B1_num_clk_s[2]_lut_out = B1_num_clk_s[2] $ (!B1_num_clk_s[2]_carry_eqn);
B1_num_clk_s[2] = DFFEAS(B1_num_clk_s[2]_lut_out, clkin, !B1_once, , , , , , );

--B1L55 is itemnew3_2:u2|num_clk_s[2]~228
--operation mode is arithmetic

B1L55 = CARRY(B1_num_clk_s[2] & (!B1L53));


--B2_num_clk_s[15] is itemnew3_2:u1|num_clk_s[15]
--operation mode is arithmetic

B2_num_clk_s[15]_carry_eqn = B2L79;
B2_num_clk_s[15]_lut_out = B2_num_clk_s[15] $ (B2_num_clk_s[15]_carry_eqn);
B2_num_clk_s[15] = DFFEAS(B2_num_clk_s[15]_lut_out, clkin, !B2_once, , , , , , );

--B2L81 is itemnew3_2:u1|num_clk_s[15]~228
--operation mode is arithmetic

B2L81 = CARRY(!B2L79 # !B2_num_clk_s[15]);


--B2_num_a_s[7] is itemnew3_2:u1|num_a_s[7]
--operation mode is normal

B2_num_a_s[7]_carry_eqn = B2L25;
B2_num_a_s[7]_lut_out = B2_num_a_s[7] $ (B2_num_a_s[7]_carry_eqn);
B2_num_a_s[7] = DFFEAS(B2_num_a_s[7]_lut_out, ain, VCC, , , ~GND, B2_once, , );


--B2_once is itemnew3_2:u1|once
--operation mode is normal

B2_once_lut_out = VCC;
B2_once = DFFEAS(B2_once_lut_out, ain, !B2_once, , !B2_\p_b:lastone, , , , );


--delay[2] is delay[2]
--operation mode is arithmetic

delay[2]_carry_eqn = A1L57;
delay[2]_lut_out = delay[2] $ (!delay[2]_carry_eqn);
delay[2] = DFFEAS(delay[2]_lut_out, clkin, !A1L72, , , , , , );

--A1L59 is delay[2]~57
--operation mode is arithmetic

A1L59 = CARRY(delay[2] & (!A1L57));


--delay[3] is delay[3]
--operation mode is arithmetic

delay[3]_carry_eqn = A1L59;
delay[3]_lut_out = delay[3] $ (delay[3]_carry_eqn);
delay[3] = DFFEAS(delay[3]_lut_out, clkin, !A1L72, , , , , , );

--A1L61 is delay[3]~61
--operation mode is arithmetic

A1L61 = CARRY(!A1L59 # !delay[3]);


--delay[0] is delay[0]
--operation mode is arithmetic

delay[0]_lut_out = !delay[0];
delay[0] = DFFEAS(delay[0]_lut_out, clkin, !A1L72, , , , , , );

--A1L55 is delay[0]~65
--operation mode is arithmetic

A1L55 = CARRY(delay[0]);


--delay[1] is delay[1]
--operation mode is arithmetic

delay[1]_carry_eqn = A1L55;
delay[1]_lut_out = delay[1] $ (delay[1]_carry_eqn);
delay[1] = DFFEAS(delay[1]_lut_out, clkin, !A1L72, , , , , , );

--A1L57 is delay[1]~69
--operation mode is arithmetic

A1L57 = CARRY(!A1L55 # !delay[1]);


--A1L79 is rtl~432
--operation mode is normal

A1L79 = delay[0] & delay[1];


--delay[4] is delay[4]
--operation mode is arithmetic

delay[4]_carry_eqn = A1L61;
delay[4]_lut_out = delay[4] $ (!delay[4]_carry_eqn);
delay[4] = DFFEAS(delay[4]_lut_out, clkin, !A1L72, , , , , , );

--A1L63 is delay[4]~73
--operation mode is arithmetic

A1L63 = CARRY(delay[4] & (!A1L61));


--delay[5] is delay[5]
--operation mode is arithmetic

delay[5]_carry_eqn = A1L63;
delay[5]_lut_out = delay[5] $ (delay[5]_carry_eqn);
delay[5] = DFFEAS(delay[5]_lut_out, clkin, !A1L72, , , , , , );

--A1L65 is delay[5]~77
--operation mode is arithmetic

A1L65 = CARRY(!A1L63 # !delay[5]);


--delay[6] is delay[6]
--operation mode is arithmetic

delay[6]_carry_eqn = A1L65;
delay[6]_lut_out = delay[6] $ (!delay[6]_carry_eqn);
delay[6] = DFFEAS(delay[6]_lut_out, clkin, !A1L72, , , , , , );

--A1L67 is delay[6]~81
--operation mode is arithmetic

A1L67 = CARRY(delay[6] & (!A1L65));


--delay[7] is delay[7]
--operation mode is normal

delay[7]_carry_eqn = A1L67;
delay[7]_lut_out = delay[7] $ (delay[7]_carry_eqn);
delay[7] = DFFEAS(delay[7]_lut_out, clkin, !A1L72, , , , , , );


--A1L80 is rtl~433
--operation mode is normal

A1L80 = delay[4] & delay[5] & delay[6] & delay[7];


--A1L73 is rtl~7
--operation mode is normal

A1L73 = delay[2] & delay[3] & A1L79 & A1L80;


--B1_once is itemnew3_2:u2|once
--operation mode is normal

B1_once_lut_out = VCC;
B1_once = DFFEAS(B1_once_lut_out, bin, !B1_once, , !B1_\p_b:lastone, , , , );


--A1L81 is rtl~434
--operation mode is normal

A1L81 = B2_num_clk_s[8] & B2_num_clk_s[1] & !B2_num_clk_s[0] & !B2_num_clk_s[16];


--A1L82 is rtl~435
--operation mode is normal

A1L82 = B2_num_clk_s[9] & B2_num_clk_s[17] & !B2_num_clk_s[2] & !B2_num_clk_s[18];


--A1L83 is rtl~436
--operation mode is normal

A1L83 = B2_num_clk_s[10] & !B2_num_clk_s[3] & !B2_num_clk_s[19] & !B2_num_clk_s[11];


--A1L84 is rtl~437
--operation mode is normal

A1L84 = B2_num_clk_s[4] & B2_num_clk_s[20] & B2_num_clk_s[12] & B2_num_clk_s[5];


--A1L85 is rtl~438
--operation mode is normal

A1L85 = A1L81 & A1L82 & A1L83 & A1L84;


--A1L86 is rtl~439
--operation mode is normal

A1L86 = B2_num_clk_s[7] & !B2_num_clk_s[13] & !B2_num_clk_s[6] & !B2_num_clk_s[14];


--A1L74 is rtl~8
--operation mode is normal

A1L74 = A1L85 & A1L86 & (!B2_num_clk_s[15]);


--A1L87 is rtl~440
--operation mode is normal

A1L87 = B1_num_clk_s[4] & !B1_num_clk_s[11] & !B1_num_clk_s[3] & !B1_num_clk_s[19];


--A1L88 is rtl~441
--operation mode is normal

A1L88 = B1_num_clk_s[12] & B1_num_clk_s[20] & B1_num_clk_s[5] & !B1_num_clk_s[13];


--A1L89 is rtl~442
--operation mode is normal

A1L89 = B1_num_clk_s[7] & !B1_num_clk_s[14] & !B1_num_clk_s[6] & !B1_num_clk_s[15];


--A1L90 is rtl~443
--operation mode is normal

A1L90 = B1_num_clk_s[8] & B1_num_clk_s[17] & !B1_num_clk_s[16] & !B1_num_clk_s[0];


--A1L91 is rtl~444
--operation mode is normal

A1L91 = A1L87 & A1L88 & A1L89 & A1L90;


--A1L92 is rtl~445
--operation mode is normal

A1L92 = B1_num_clk_s[9] & B1_num_clk_s[1] & B1_num_clk_s[10] & !B1_num_clk_s[18];


--A1L75 is rtl~9
--operation mode is normal

A1L75 = A1L91 & A1L92 & (!B1_num_clk_s[2]);


--~GND is ~GND
--operation mode is normal

~GND = GND;


--sel[0] is sel[0]
--operation mode is input

sel[0] = INPUT();


--sel[2] is sel[2]
--operation mode is input

sel[2] = INPUT();


--sel[1] is sel[1]
--operation mode is input

sel[1] = INPUT();


--ain is ain
--operation mode is input

ain = INPUT();


--bin is bin
--operation mode is input

bin = INPUT();


--clkin is clkin
--operation mode is input

clkin = INPUT();


--data[0] is data[0]
--operation mode is output

data[0] = OUTPUT(A1L19);


--data[1] is data[1]
--operation mode is output

data[1] = OUTPUT(A1L24);


--data[2] is data[2]
--operation mode is output

data[2] = OUTPUT(A1L32);


--data[3] is data[3]
--operation mode is output

data[3] = OUTPUT(A1L36);


--data[4] is data[4]
--operation mode is output

data[4] = OUTPUT(A1L40);


--data[5] is data[5]
--operation mode is output

data[5] = OUTPUT(A1L44);


--data[6] is data[6]
--operation mode is output

data[6] = OUTPUT(A1L48);


--data[7] is data[7]
--operation mode is output

data[7] = OUTPUT(A1L52);


--intermit is intermit
--operation mode is output

intermit = OUTPUT(A1L72);