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width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT POL
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT VCK
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT VOE
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT VSP
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT INV
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
}
}
}
USER_INTERFACE
{
USER_LABELS
{
name = "altera_avalon_nec_tft_lcd_controller";
technology = "imported components";
}
}
CB_GENERATOR
{
top_module_name = "altera_avalon_nec_tft_lcd_controller";
emit_system_h = "0";
HDL_FILES
{
FILE
{
filepath = "C:/max2work/avalon_peripherals/altera_avalon_nec_tft_lcd_controller/standard/nec_lcd_controller/hdl/altera_avalon_nec_tft_lcd_controller.vhd";
use_in_simulation = "1";
use_in_synthesis = "1";
}
}
}
SOPC_Builder_Version = "0.0";
COMPONENT_BUILDER
{
HDL_PARAMETERS
{
# generated by cbDocument.CBDocument.getParameterContainer:385
# used only by Component Editor
HDL_PARAMETER horiz_res
{
parameter_name = "HORIZ_RES";
type = "integer";
default_value = "240";
editable = "1";
tooltip = "";
}
HDL_PARAMETER vert_res
{
parameter_name = "VERT_RES";
type = "integer";
default_value = "320";
editable = "1";
tooltip = "";
}
}
}
}
}
}
FILE fifo_256x32.vhd
{
file_mod = "Sat Aug 13 10:53:00 EDT 2005";
quartus_map_start = "Sun Aug 21 18:57:40 EDT 2005";
quartus_map_finished = "Sun Aug 21 18:57:43 EDT 2005";
#found 1 valid modules
WRAPPER fifo_256x32
{
CLASS fifo_256x32
{
MODULE_DEFAULTS
{
class = "fifo_256x32";
class_version = "1.0";
SYSTEM_BUILDER_INFO
{
Instantiate_In_System_Module = "1";
}
SLAVE avalon_slave_0
{
SYSTEM_BUILDER_INFO
{
Bus_Type = "avalon";
}
PORT_WIRING
{
PORT data
{
width = "32";
width_expression = "";
direction = "input";
type = "export";
is_shared = "0";
}
PORT wrreq
{
width = "1";
width_expression = "";
direction = "input";
type = "export";
is_shared = "0";
}
PORT rdreq
{
width = "1";
width_expression = "";
direction = "input";
type = "export";
is_shared = "0";
}
PORT rdclk
{
width = "1";
width_expression = "";
direction = "input";
type = "export";
is_shared = "0";
}
PORT wrclk
{
width = "1";
width_expression = "";
direction = "input";
type = "export";
is_shared = "0";
}
PORT aclr
{
width = "1";
width_expression = "";
direction = "input";
type = "export";
is_shared = "0";
}
PORT q
{
width = "32";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT rdempty
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT wrusedw
{
width = "8";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
}
}
}
USER_INTERFACE
{
USER_LABELS
{
name = "fifo_256x32";
technology = "imported components";
}
}
CB_GENERATOR
{
top_module_name = "fifo_256x32";
emit_system_h = "0";
HDL_FILES
{
FILE
{
filepath = "C:/max2work/avalon_peripherals/altera_avalon_nec_tft_lcd_controller/standard/nec_lcd_controller/hdl/fifo_256x32.vhd";
use_in_simulation = "1";
use_in_synthesis = "1";
}
}
}
SOPC_Builder_Version = "0.0";
}
}
}
FILE timing_control.vhd
{
file_mod = "Wed Aug 17 06:34:50 EDT 2005";
quartus_map_start = "Sun Aug 21 18:57:43 EDT 2005";
quartus_map_finished = "Sun Aug 21 18:57:45 EDT 2005";
#found 1 valid modules
WRAPPER timing_control
{
CLASS timing_control
{
MODULE_DEFAULTS
{
class = "timing_control";
class_version = "1.0";
SYSTEM_BUILDER_INFO
{
Instantiate_In_System_Module = "1";
}
SLAVE avalon_slave_0
{
SYSTEM_BUILDER_INFO
{
Bus_Type = "avalon";
}
PORT_WIRING
{
PORT clk
{
width = "1";
width_expression = "";
direction = "input";
type = "clk";
is_shared = "0";
}
PORT reset
{
width = "1";
width_expression = "";
direction = "input";
type = "reset";
is_shared = "0";
}
PORT palette_mode
{
width = "2";
width_expression = "";
direction = "input";
type = "export";
is_shared = "0";
}
PORT vert_scan_dir
{
width = "1";
width_expression = "";
direction = "input";
type = "export";
is_shared = "0";
}
PORT video_lane_select_ext
{
width = "2";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT fifo_rdreq_ext
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT fifo_empty
{
width = "1";
width_expression = "";
direction = "input";
type = "export";
is_shared = "0";
}
PORT fifo_data_available_ext
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT palette_mode_lock_ext
{
width = "2";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT HCK
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT STB
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT HSP
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT AP
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT POL
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT VCK
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT VOE
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT VSP
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT INV
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
}
}
}
USER_INTERFACE
{
USER_LABELS
{
name = "timing_control";
technology = "imported components";
}
}
CB_GENERATOR
{
top_module_name = "timing_control";
emit_system_h = "0";
HDL_FILES
{
FILE
{
filepath = "C:/max2work/avalon_peripherals/altera_avalon_nec_tft_lcd_controller/standard/nec_lcd_controller/hdl/timing_control.vhd";
use_in_simulation = "1";
use_in_synthesis = "1";
}
}
}
SOPC_Builder_Version = "0.0";
COMPONENT_BUILDER
{
HDL_PARAMETERS
{
# generated by cbDocument.CBDocument.getParameterContainer:385
# used only by Component Editor
HDL_PARAMETER horiz_res
{
parameter_name = "HORIZ_RES";
type = "integer";
default_value = "240";
editable = "1";
tooltip = "";
}
HDL_PARAMETER vert_res
{
parameter_name = "VERT_RES";
type = "integer";
default_value = "320";
editable = "1";
tooltip = "";
}
}
}
}
}
}
}
HDL_PARAMETERS
{
# generated by cbDocument.CBDocument.getParameterContainer:348
# used only by Component Editor
HDL_PARAMETER horiz_res
{
parameter_name = "HORIZ_RES";
type = "integer";
default_value = "240";
editable = "1";
tooltip = "";
}
HDL_PARAMETER vert_res
{
parameter_name = "VERT_RES";
type = "integer";
default_value = "320";
editable = "1";
tooltip = "";
}
}
SW_FILES
{
FILE
{
filepath = "inc/altera_avalon_nec_lcd_controller_regs.h";
type = "Registers (inc/)";
}
}
built_on = "2005.08.21.18:59:58";
}
ASSOCIATED_FILES
{
Add_Program = "the_wizard_ui";
Edit_Program = "the_wizard_ui";
Generator_Program = "cb_generator.pl";
}
SOPC_Builder_Version = "5.00";
}
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