📄 class.ptf
字号:
#
# This class.ptf file built by Component Editor
# 2005.08.21.18:59:58
#
# DO NOT MODIFY THIS FILE
# If you hand-modify this file you will likely
# interfere with Component Editor's ability to
# read and edit it. And then Component Editor
# will overwrite your changes anyway. So, for
# the very best results, just relax and
# DO NOT MODIFY THIS FILE
#
CLASS nec_lcd_controller
{
MODULE_DEFAULTS
{
class = "nec_lcd_controller";
class_version = "1.0";
SYSTEM_BUILDER_INFO
{
Instantiate_In_System_Module = "1";
Top_Level_Ports_Are_Enumerated = "1";
}
PORT_WIRING
{
}
SIMULATION
{
DISPLAY
{
SIGNAL x101
{
name = "NEC LCD Controller/global_signals";
format = "Divider";
}
SIGNAL x102
{
name = "NEC LCD Controller/avalon_slave_0";
format = "Divider";
}
SIGNAL x103
{
name = "clk";
}
SIGNAL x104
{
name = "reset";
}
SIGNAL x105
{
name = "read";
}
SIGNAL x106
{
name = "readdata";
radix = "hexadecimal";
}
SIGNAL x107
{
name = "write";
}
SIGNAL x108
{
name = "writedata";
radix = "hexadecimal";
}
SIGNAL x109
{
name = "address";
radix = "hexadecimal";
}
SIGNAL x110
{
name = "chipselect";
}
SIGNAL x111
{
name = "irq";
}
SIGNAL x112
{
name = "tclk";
}
SIGNAL x113
{
name = "BL_EN";
}
SIGNAL x114
{
name = "HCK";
}
SIGNAL x115
{
name = "STB";
}
SIGNAL x116
{
name = "HSP";
}
SIGNAL x117
{
name = "R";
radix = "hexadecimal";
}
SIGNAL x118
{
name = "G";
radix = "hexadecimal";
}
SIGNAL x119
{
name = "B";
radix = "hexadecimal";
}
SIGNAL x120
{
name = "AP";
}
SIGNAL x121
{
name = "POL";
}
SIGNAL x122
{
name = "VCK";
}
SIGNAL x123
{
name = "VOE";
}
SIGNAL x124
{
name = "VSP";
}
SIGNAL x125
{
name = "INV";
}
SIGNAL x126
{
name = "NEC LCD Controller/avalon_master_0";
format = "Divider";
}
SIGNAL x127
{
name = "clk_mp";
}
SIGNAL x128
{
name = "read_mp";
}
SIGNAL x129
{
name = "waitrequest";
}
SIGNAL x130
{
name = "burstcount";
radix = "hexadecimal";
}
SIGNAL x131
{
name = "readdatavalid";
}
SIGNAL x132
{
name = "readdata_mp";
radix = "hexadecimal";
}
SIGNAL x133
{
name = "address_mp";
radix = "hexadecimal";
}
}
}
WIZARD_SCRIPT_ARGUMENTS
{
hdl_parameters
{
horiz_res = "240";
vert_res = "320";
}
}
COMPONENT_BUILDER
{
GLS_SETTINGS
{
}
}
SLAVE avalon_slave_0
{
SYSTEM_BUILDER_INFO
{
Bus_Type = "avalon";
Address_Width = "9";
Address_Alignment = "native";
Data_Width = "32";
Has_Base_Address = "1";
Has_IRQ = "1";
Setup_Time = "0cycles";
Hold_Time = "0cycles";
Read_Wait_States = "1cycles";
Write_Wait_States = "0cycles";
Read_Latency = "0";
Maximum_Pending_Read_Transactions = "0";
Is_Printable_Device = "0";
Is_Memory_Device = "0";
Is_Readable = "1";
Is_Writable = "1";
Minimum_Uninterrupted_Run_Length = "1";
}
COMPONENT_BUILDER
{
AVS_SETTINGS
{
Setup_Value = "0";
Read_Wait_Value = "1";
Write_Wait_Value = "0";
Hold_Value = "0";
Timing_Units = "cycles";
Read_Latency_Value = "0";
Max_Pending_Read_Transactions_Value = "1";
Address_Alignment = "native";
Is_Printable_Device = "0";
Is_Memory_Device = "0";
external_wait = "0";
interface_name = "Avalon Slave";
Minimum_Arbitration_Shares = "1";
}
}
PORT_WIRING
{
PORT clk
{
width = "1";
width_expression = "";
direction = "input";
type = "clk";
is_shared = "0";
}
PORT reset
{
width = "1";
width_expression = "";
direction = "input";
type = "reset";
is_shared = "0";
}
PORT read
{
width = "1";
width_expression = "";
direction = "input";
type = "read";
is_shared = "0";
}
PORT readdata
{
width = "32";
width_expression = "";
direction = "output";
type = "readdata";
is_shared = "0";
}
PORT write
{
width = "1";
width_expression = "";
direction = "input";
type = "write";
is_shared = "0";
}
PORT writedata
{
width = "32";
width_expression = "";
direction = "input";
type = "writedata";
is_shared = "0";
}
PORT address
{
width = "9";
width_expression = "";
direction = "input";
type = "address";
is_shared = "0";
}
PORT chipselect
{
width = "1";
width_expression = "";
direction = "input";
type = "chipselect";
is_shared = "0";
}
PORT irq
{
width = "1";
width_expression = "";
direction = "output";
type = "irq";
is_shared = "0";
}
PORT tclk
{
width = "1";
width_expression = "";
direction = "input";
type = "export";
is_shared = "0";
}
PORT BL_EN
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT PS_EN
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT HCK
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT STB
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT HSP
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT R
{
width = "6";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT G
{
width = "6";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT B
{
width = "6";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT AP
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT POL
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT VCK
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT VOE
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT VSP
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
PORT INV
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
}
}
MASTER avalon_master_0
{
SYSTEM_BUILDER_INFO
{
Bus_Type = "avalon";
Address_Width = "32";
Data_Width = "32";
Do_Stream_Reads = "0";
Do_Stream_Writes = "0";
Is_Asynchronous = "0";
Has_IRQ = "0";
Irq_Scheme = "none";
Interrupt_Range = "";
Is_Readable = "1";
Is_Writable = "0";
Register_Outgoing_Signals = "0";
Maximum_Burst_Size = "16";
}
COMPONENT_BUILDER
{
AVM_SETTINGS
{
stream_reads = "0";
stream_writes = "0";
irq_width = "0";
irq_number_width = "0";
irq_scheme = "none";
Is_Asynchronous = "0";
}
}
PORT_WIRING
{
PORT clk_mp
{
width = "1";
width_expression = "";
direction = "input";
type = "clk";
is_shared = "0";
}
PORT read_mp
{
width = "1";
width_expression = "";
direction = "output";
type = "read";
is_shared = "0";
}
PORT waitrequest
{
width = "1";
width_expression = "";
direction = "input";
type = "waitrequest";
is_shared = "0";
}
PORT burstcount
{
width = "4";
width_expression = "";
direction = "output";
type = "burstcount";
is_shared = "0";
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -