timer_send.s

AVR控制的SAB82525——HDLC通信 循环队列处理 完全是自己写的

	.dbline 144
; 	
; 	//取消片选
; 	PORTD|=0x20;				//0010_0000
	sbi 0x12,5
	.dbline 145
; 	return;
	.dbline -2
L5:
	.dbline 0 ; func end
	ret
	.dbend
	.dbfunc e automode _automode fV
	.even
_automode::
	.dbline -1
	.dbline 149
; }
; //------------------------------------------------------------------
; void automode(void)
; {    
	.dbline 150
;     CCR1=0x98;			//1001_1000
	ldi R24,152
	sts 8239,R24
	.dbline 152
;     
; 	  MASB=0xfb;			//1111_1011
	ldi R24,251
	sts 8288,R24
	.dbline 153
; 	  MASK=0x27;			//0010_0111
	ldi R24,39
	sts 8224,R24
	.dbline 154
; 	  MODE=0x18;			//0001_1100		数据传输由HSCX自动管理
	ldi R24,24
	sts 8226,R24
	.dbline 155
;     TIMR=0x7f;			//监控帧自动重试的次数
	ldi R24,127
	sts 8227,R24
	.dbline 157
;     
;     XAD1=0x00;			//未知
	clr R2
	sts 8227,R2
	.dbline 158
;     XAD2=0x03;			//未知
	ldi R24,3
	sts 8229,R24
	.dbline 159
;     RAH1=0x02;			//IMPORMANT!!!
	ldi R24,2
	sts 8230,R24
	.dbline 160
;     RAH2=0x00;			//IMPORTANT!!!
	sts 8231,R2
	.dbline 161
;     RAL1=0x01; 			//未知
	ldi R24,1
	sts 8232,R24
	.dbline 162
;     RAL2=0x01;			//未知
	sts 8233,R24
	.dbline 163
;     CCR2=0x00;			//
	sts 8236,R2
	.dbline 166
;     
;     
;     XBCH=0x00;
	sts 8237,R2
L7:
	.dbline 167
L8:
	.dbline 167
;     while(CEC==1);	//等待CMDR可写
	lds R24,8225
	andi R24,4
	lsr R24
	lsr R24
	cpi R24,1
	breq L7
	.dbline 168
;     CMDR=0x41;		//重启收发器
	ldi R24,65
	sts 8225,R24
	.dbline -2
	.dbline 169
; }
L6:
	.dbline 0 ; func end
	ret
	.dbend
	.dbfunc e delay_nms _delay_nms fV
;          i_dms -> R20,R21
;             tm -> R22,R23
	.even
_delay_nms::
	xcall push_gset2
	movw R22,R16
	.dbline -1
	.dbline 172
; //-----------------------------------------------------------------------
; void delay_nms(unsigned int tm)
; {
	.dbline 174
; 	unsigned int i_dms;
; 	for(i_dms=tm;i_dms>0;i_dms--)
	movw R20,R22
	xjmp L14
L11:
	.dbline 175
	xcall _delay_1ms
L12:
	.dbline 174
	subi R20,1
	sbci R21,0
L14:
	.dbline 174
	cpi R20,0
	cpc R20,R21
	brne L11
X0:
	.dbline -2
	.dbline 176
; 		delay_1ms();
; }
L10:
	xcall pop_gset2
	.dbline 0 ; func end
	ret
	.dbsym r i_dms 20 i
	.dbsym r tm 22 i
	.dbend
	.dbfunc e delay_1ms _delay_1ms fV
;           i_dl -> R16,R17
	.even
_delay_1ms::
	.dbline -1
	.dbline 179
; //------------------------------------------------------------------
; void delay_1ms(void)
; {
	.dbline 181
; 	unsigned int i_dl;
; 	for(i_dl=1;i_dl<(unsigned int)(4*143-2);i_dl++)
	ldi R16,1
	ldi R17,0
	xjmp L19
L16:
	.dbline 182
L17:
	.dbline 181
	subi R16,255  ; offset = 1
	sbci R17,255
L19:
	.dbline 181
	cpi R16,58
	ldi R30,2
	cpc R17,R30
	brlo L16
	.dbline -2
	.dbline 183
; 	;
; }
L15:
	.dbline 0 ; func end
	ret
	.dbsym r i_dl 16 i
	.dbend
	.dbfunc e transmit _transmit fV
;            xfw -> R22
;             it -> R20
	.even
_transmit::
	xcall push_gset2
	.dbline -1
	.dbline 186
; //------------------------------------------------------------------
; void transmit(void)
; {
	.dbline 187
; 	unsigned char it=0;
	clr R20
	.dbline 190
; 	unsigned char xfw;
; 	
; 	flag_txd=1;
	ldi R24,1
	sts _flag_txd,R24
	.dbline 192
; 	
; 	if(count!=0)
	lds R2,_count
	tst R2
	brne X1
	xjmp L21
X1:
	.dbline 193
; 		{
	.dbline 194
; 			DeQueue();
	xcall _DeQueue
L23:
	.dbline 196
L24:
	.dbline 196
; 			
; 			while(CEC==1);
	lds R24,8225
	andi R24,4
	lsr R24
	lsr R24
	cpi R24,1
	breq L23
L26:
	.dbline 198
; 			do
; 			{
	.dbline 199
; 				xfw=XFW;
	lds R22,8225
	andi R22,64
	lsr R22
	lsr R22
	lsr R22
	lsr R22
	lsr R22
	lsr R22
	.dbline 200
L27:
	.dbline 200
; 			}while(xfw!=1);
	cpi R22,1
	brne L26
	.dbline 202
; 
; 			for(it=0;it<pre_txd[32];it++)
	clr R20
	xjmp L32
L29:
	.dbline 203
	.dbline 204
	ldi R24,<_pre_txd
	ldi R25,>_pre_txd
	mov R30,R20
	clr R31
	add R30,R24
	adc R31,R25
	ldd R2,z+0
	mov R30,R20
	clr R31
	subi R30,0  ; offset = 8192
	sbci R31,224
	std z+0,R2
	.dbline 205
L30:
	.dbline 202
	inc R20
L32:
	.dbline 202
	lds R2,_pre_txd+32
	cp R20,R2
	brlo L29
L34:
	.dbline 207
L35:
	.dbline 207
; 			{
; 				XFIFO[0x2000+it]=pre_txd[it];
; 			}
; 	
; 			while(CEC==1);//等待CMDR可写
	lds R24,8225
	andi R24,4
	lsr R24
	lsr R24
	cpi R24,1
	breq L34
	.dbline 208
; 			CMDR|=0x0a;		//写入，引起发送
	lds R24,8225
	ori R24,10
	sts 8225,R24
	.dbline 210
; 	
; 		}
L21:
	.dbline 212
; 	
; 	delay_1ms();
	xcall _delay_1ms
	.dbline 213
; 	flag_txd=0;
	clr R2
	sts _flag_txd,R2
	.dbline -2
	.dbline 215
; 
; }
L20:
	xcall pop_gset2
	.dbline 0 ; func end
	ret
	.dbsym r xfw 22 c
	.dbsym r it 20 c
	.dbend
	.dbfunc e main _main fI
;             im -> R20,R21
	.even
_main::
	.dbline -1
	.dbline 218
; //-----------------------------------------------------------------------
; main()
; {
	.dbline 219
;   int im=0;
	clr R20
	clr R21
	.dbline 221
;   
;   chipinit();
	xcall _chipinit
	.dbline 222
;   clk();
	xcall _clk
	.dbline 223
;   resethdlc();
	xcall _resethdlc
	.dbline 224
;   cshdlc();
	xcall _cshdlc
	.dbline 225
;   automode();
	xcall _automode
	.dbline 226
;   InitQueue();
	xcall _InitQueue
	.dbline 227
;   timer0_init();
	xcall _timer0_init
	.dbline 228
;   int_open();
	.dbline -2
	.dbline 253
; 	
; 	/*txd[0]=0x02;
; 	txd[1]=0x93;
; 	EnQueue(txd,2);
; 	
; 	txd[0]=0x02;
; 	txd[1]=0x00;
; 	for(im=2;im<17;im++)
; 		txd[im]=0x99;
; 	EnQueue(txd,17);
; 	for(im=0;im<27;im++)
; 		txd[im]=0xaa;
; 	EnQueue(txd,27);
; 	
; 	delay_nms(1000);
; 	EnQueue(txd,27);
; 	
; 	while(flag_txd);
; 	transmit();
; 	while(flag_txd);
; 	transmit();
; 	while(flag_txd);
; 	transmit();*/
; 
; }
L37:
	.dbline 0 ; func end
	xjmp _int_open
	.dbsym r im 20 I
	.dbend
	.area bss(ram, con, rel)
	.dbfile E:\Projects\AVR\Timer_Send\Timer_Send.c
_count::
	.blkb 1
	.dbsym e count _count c
_pre_txd::
	.blkb 33
	.dbsym e pre_txd _pre_txd A[33:33]c
_flag_txd::
	.blkb 1
	.dbsym e flag_txd _flag_txd c