📄 ssx31bdrv.c
字号:
*ppucSrc = pSourceMBuf->pDataBlkDesc->pBuf;
MBUF_Destroy_DataBlock_2(pSourceMBuf);
/*toyinfo*/
//printk("ISR: pSourceMBuf freed, left only 1 data blk!\n");
ulTotalLen = pRdDesc->ulOutputLength;
if ( pRdDesc->ulScatterEnable )
{
/*--no need ---
ULONG tmpVirtAddr;
tmpVirtAddr=ssx31_dma_virt_mapping_findByDmaPhys(pRdDesc->ulOutputContext, &ultmpBufLen);
pScatterDesc = (SSX31B_OCD*)tmpVirtAddr;
printk("IPSecGetRD: rOutputDataPtr=%08x\n",pScatterDesc->ulOutputPtr);
---*/
tmpDmaAddr=ssx31_dma_virt_mapping_findByVirt(pRdDesc->ulOrigBuf, &ultmpBufLen);
ulBufAddr=four_bytes_align_en(tmpDmaAddr, pRdDesc->ulOrigBuf); //aligned dma--virt was not mapped
ulBufLen = pRdDesc->ulOutputNum * MAX_MEM_LEN_SSX31B_DRVIER;
//printk("IPSecGetRD: ulOrigBuf=%08x, OutputDataBuf=%08x\n",pRdDesc->ulOrigBuf,ulBufAddr);
}
else
{
tmpDmaAddr=ssx31_dma_virt_mapping_findByVirt(pRdDesc->ulOrigBuf, &ultmpBufLen);
ulBufAddr=four_bytes_align_en(tmpDmaAddr,pRdDesc->ulOrigBuf); //aligned dma--virt was not mapped
ulBufLen = MAX_MEM_LEN_SSX31B_DRVIER;
//printk("IPSecGetRD: ulOrigBuf=%08x, OutputDataBuf=%08x\n",pRdDesc->ulOrigBuf,ulBufAddr);
}
MBUF_CHANGE_DATA_BLOCK(pSourceMBuf,
pRdDesc->ulOrigBuf,
ulBufLen,
(UCHAR *)ulBufAddr,
ulTotalLen,
0,
MID_VIRT2);
pDrvCtrl->ulOutSSX31BBytes += ulTotalLen;
pDrvCtrl->ulOutSSX31BPkts ++;
return;
}
VOID SSX31B_ISR(SSX31BDRV_CTRL * pDrvCtrl)
{
ULONG ulIntStat;
LONG lIntMask;
UCHAR* pucTmp;
SSX31B_IPSEC_RD* pIPSecRdDesc;
SSX31B_PKE_RD* pPkeRdDesc;
SplImp(&lIntMask);
//disable_irq(pDrvCtrl->pPciDev->irq);
pDrvCtrl->ulIntCounter ++;
PciRead32(SSX31B_REG_INT_STAT, &ulIntStat);
if ((ulIntStat & SSX31B_INT_MASK) != 0)
{
/*toyinfo*/
//printk ("%s intr: DMA3_PAKT_OPDONE or DMA3_PROC_TMOUT\n", pDrvCtrl->pchName);
PciRead32(SSX31B_REG_BQRP3, &pDrvCtrl->ulCurrIPSecBdReadPtr);
PciRead32(SSX31B_REG_RQWP3, &pDrvCtrl->ulCurrIPSecRdWritePtr);
if (pDrvCtrl->ulCurrIPSecRdWritePtr == pDrvCtrl->ulCurrIPSecRdReadPtr)
{
//enable_irq(pDrvCtrl->pPciDev->irq);
SplX(lIntMask);
return;
}
for(;;)
{
pIPSecRdDesc = &((SSX31B_IPSEC_RD*)(pDrvCtrl->ulIPSecRDMemBase))[pDrvCtrl->ulCurrIPSecRdReadPtr];
#if 0
{
unsigned long* ulTmp = (unsigned long*)pIPSecRdDesc;
printk ("\r\nRD %08x %08x %08x %08x %08x %08x", ulTmp[0], ulTmp[1], ulTmp[2], ulTmp[3], ulTmp[4], ulTmp[5]);
}
#endif
if (bIPSecPerf == 0)
{
if ( ((pIPSecRdDesc->ulStatus & DMA3_ERR_MASK) == DMA3_ERR_SUCESS)
&& ((pIPSecRdDesc->ulStatus & DMA3_ENGING_ERR_MASK) == DMA3_ENGING_ERR_SUCESS) )
{
SSX31B_IPSecGetRD(pDrvCtrl, pIPSecRdDesc, &pucTmp); /*Src MBuf has destroyed with ony 1 datablock, pucTmp remenbers the src buf*/
SSX31B_PreFreeBDDesc(pDrvCtrl, pIPSecRdDesc); /*free the OCDs*/
}
else
{
PRINT("Wrong status for RD 0x%04x\r\n", pIPSecRdDesc->ulStatus);
SSX31B_HandleError(pDrvCtrl, pIPSecRdDesc);
pucTmp = NULL;
}
if (mbufq_reader == ((mbufq_writer + 1)&(SSX31B_MBUFQ_LEN - 1)) )
{
PRINT ("\nMBuf Queue overflow!");
}
mbufq[mbufq_writer].pmbuf = pIPSecRdDesc->ulMBufPtr;
mbufq[mbufq_writer].flgHandleErr = (UCHAR)(((pIPSecRdDesc->ulStatus & DMA3_ENGING_ERR_MASK) >> 7) | (pIPSecRdDesc->ulStatus &
DMA3_ERR_MASK));
//printk("flgHandleErr=0x%02x\n",mbufq[mbufq_writer].flgHandleErr);
mbufq[mbufq_writer].pucSource = pucTmp;
//printk("SrcBuf swaped out (V)%08x\n",pucTmp);
mbufq_writer = ((mbufq_writer + 1)&(SSX31B_MBUFQ_LEN - 1));
}
else
{
pDrvCtrl->ulIPSecPerfCnt++;
if ( pIPSecRdDesc->ulStatus != 0)
{
//printk ("\n SSX31B_INT_MASK err %04x", pIPSecRdDesc->ulStatus);
pDrvCtrl->ulIPSecPerfErrCnt++;
}
}
pDrvCtrl->ulCurrIPSecRdReadPtr = (pDrvCtrl->ulCurrIPSecRdReadPtr + 1) & (SSX31B_IPSEC_RDQUEUE_LEN - 1);
pDrvCtrl->ulFreeIPSecBDs ++;
if (pDrvCtrl->ulCurrIPSecRdWritePtr == pDrvCtrl->ulCurrIPSecRdReadPtr)
{
PciWrite32(SSX31B_REG_RQRP3, pDrvCtrl->ulCurrIPSecRdReadPtr);
/* wake_up_interruptible(&appwait); */
/* wake_up_interruptible(&inwait); */
break;
}
}
//wake_up_interruptible(&appwait); /*toy*/
wake_up_interruptible(&inwait);
}
else if ( (ulIntStat & INT_MASK_DMA2_PAKT_OPDONE) != 0 )
{
/*toyinfo*/
//printk ("%s intr: DMA2_PAKT_OPDONE\n", pDrvCtrl->pchName);
PciRead32(SSX31B_REG_BQRP2, &pDrvCtrl->ulCurrPkeBdReadPtr);
PciRead32(SSX31B_REG_RQWP2, &pDrvCtrl->ulCurrPkeRdWritePtr);
if (pDrvCtrl->ulCurrPkeRdWritePtr == pDrvCtrl->ulCurrPkeRdReadPtr)
{
//enable_irq(pDrvCtrl->pPciDev->irq);
SplX(lIntMask);
return;
}
for(;;)
{
pPkeRdDesc = &((SSX31B_PKE_RD*)(pDrvCtrl->ulPkeRDMemBase))[pDrvCtrl->ulCurrPkeRdReadPtr];
#if 0
{
unsigned long* ulTmp = (unsigned long*)pIPSecRdDesc;
printk ("\r\nRD %08x %08x %08x %08x %08x %08x", ulTmp[0], ulTmp[1], ulTmp[2], ulTmp[3], ulTmp[4], ulTmp[5]);
}
#endif
if (bIPSecPerf == 0)
{
}
else
{
pDrvCtrl->ulIPSecPerfCnt++;
if ( pPkeRdDesc->ulStatus != 0)
{
//printk ("\n DMA2 err %04x", pIPSecRdDesc->ulStatus);
pDrvCtrl->ulIPSecPerfErrCnt++;
}
}
pDrvCtrl->ulCurrPkeRdReadPtr = (pDrvCtrl->ulCurrPkeRdReadPtr + 1) & (SSX31B_PKE_RDQUEUE_LEN - 1);
if (pDrvCtrl->ulCurrPkeRdWritePtr == pDrvCtrl->ulCurrPkeRdReadPtr)
{
PciWrite32(SSX31B_REG_RQRP2, pDrvCtrl->ulCurrPkeRdReadPtr);
break;
}
}
}
if ( bIPSecPerf == 1 && pDrvCtrl->ulIPSecPerfCnt >= g_ipsec_performace_num)
{
up(&ipsec_perf_sema);
}
//enable_irq(pDrvCtrl->pPciDev->irq);
SplX(lIntMask);
}
VOID SSX31B_ShowReg(SSX31BDRV_CTRL * pDrvCtrl, UCHAR* pucBuffer)
{
ULONG ulTmp, ulTmp1, ulTmp2, ulTmp3;
#define REG_ADDR(x) (x)
PciRead32(SSX31B_REG_MRID, &ulTmp);
PciRead32(SSX31B_REG_SDRAM_CTRL, &ulTmp1);
PciRead32(SSX31B_REG_CYC_CNT_1US, &ulTmp2);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "MRID", REG_ADDR(SSX31B_REG_MRID), ulTmp);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "SDRAM_CTRL", REG_ADDR(SSX31B_REG_SDRAM_CTRL), ulTmp1);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "CYC_CNT_1US", REG_ADDR(SSX31B_REG_CYC_CNT_1US),ulTmp2);
PciRead32(SSX31B_REG_INT_CTRL2, &ulTmp);
PciRead32(SSX31B_REG_INT_MASK, &ulTmp1);
PciRead32(SSX31B_REG_PE_CTRL, &ulTmp2);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "INT_CTRL2", REG_ADDR(SSX31B_REG_INT_CTRL2), ulTmp);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "INT_MASK", REG_ADDR(SSX31B_REG_INT_MASK), ulTmp1);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "PE_CTRL", REG_ADDR(SSX31B_REG_PE_CTRL), ulTmp2);
PciRead32(SSX31B_REG_BQBA1, &ulTmp);
PciRead32(SSX31B_REG_BQS1, &ulTmp1);
PciRead32(SSX31B_REG_BQRP1, &ulTmp2);
PciRead32(SSX31B_REG_BQWP1, &ulTmp3);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "BQBA1", REG_ADDR(SSX31B_REG_BQBA1), ulTmp);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "BQS1", REG_ADDR(SSX31B_REG_BQS1), ulTmp1);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "BQRP1", REG_ADDR(SSX31B_REG_BQRP1), ulTmp2);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "BQWP1", REG_ADDR(SSX31B_REG_BQWP1), ulTmp3);
PciRead32(SSX31B_REG_RQBA1, &ulTmp);
PciRead32(SSX31B_REG_RQS1, &ulTmp1);
PciRead32(SSX31B_REG_RQRP1, &ulTmp2);
PciRead32(SSX31B_REG_RQWP1, &ulTmp3);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "RQBA1", REG_ADDR(SSX31B_REG_RQBA1), ulTmp);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "RQS1", REG_ADDR(SSX31B_REG_RQS1), ulTmp1);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "RQRP1", REG_ADDR(SSX31B_REG_RQRP1), ulTmp2);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "RQWP1", REG_ADDR(SSX31B_REG_RQWP1), ulTmp3);
PciRead32(SSX31B_REG_DMACTRL1, &ulTmp);
PciRead32(SSX31B_REG_PDLR1, &ulTmp1);
PciRead32(SSX31B_REG_BQTMOUT1, &ulTmp2);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "DMACTRL1", REG_ADDR(SSX31B_REG_DMACTRL1), ulTmp);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "BQTMOUT1", REG_ADDR(SSX31B_REG_BQTMOUT1), ulTmp2);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "PDLR1", REG_ADDR(SSX31B_REG_PDLR1), ulTmp1);
PciRead32(SSX31B_REG_BQBA2, &ulTmp);
PciRead32(SSX31B_REG_BQS2, &ulTmp1);
PciRead32(SSX31B_REG_BQRP2, &ulTmp2);
PciRead32(SSX31B_REG_BQWP2, &ulTmp3);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "BQBA2", REG_ADDR(SSX31B_REG_BQBA2), ulTmp);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "BQS2", REG_ADDR(SSX31B_REG_BQS2), ulTmp1);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "BQRP2", REG_ADDR(SSX31B_REG_BQRP2), ulTmp2);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "BQWP2", REG_ADDR(SSX31B_REG_BQWP2), ulTmp3);
PciRead32(SSX31B_REG_RQBA2, &ulTmp);
PciRead32(SSX31B_REG_RQS2, &ulTmp1);
PciRead32(SSX31B_REG_RQRP2, &ulTmp2);
PciRead32(SSX31B_REG_RQWP2, &ulTmp3);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "RQBA2", REG_ADDR(SSX31B_REG_RQBA2), ulTmp);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "RQS2", REG_ADDR(SSX31B_REG_RQS2), ulTmp1);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "RQRP2", REG_ADDR(SSX31B_REG_RQRP2), ulTmp2);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "RQWP2", REG_ADDR(SSX31B_REG_RQWP2), ulTmp3);
PciRead32(SSX31B_REG_DMACTRL2, &ulTmp);
PciRead32(SSX31B_REG_PDLR2, &ulTmp1);
PciRead32(SSX31B_REG_BQTMOUT2, &ulTmp2);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "DMACTRL2", REG_ADDR(SSX31B_REG_DMACTRL2), ulTmp);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "BQTMOUT2", REG_ADDR(SSX31B_REG_BQTMOUT2), ulTmp2);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "PDLR2", REG_ADDR(SSX31B_REG_PDLR2), ulTmp1);
PciRead32(SSX31B_REG_BQBA3, &ulTmp);
PciRead32(SSX31B_REG_BQS3, &ulTmp1);
PciRead32(SSX31B_REG_BQRP3, &ulTmp2);
PciRead32(SSX31B_REG_BQWP3, &ulTmp3);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "BQBA3", REG_ADDR(SSX31B_REG_BQBA3), ulTmp);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "BQS3", REG_ADDR(SSX31B_REG_BQS3), ulTmp1);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "BQRP3", REG_ADDR(SSX31B_REG_BQRP3), ulTmp2);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "BQWP3", REG_ADDR(SSX31B_REG_BQWP3), ulTmp3);
PciRead32(SSX31B_REG_RQBA3, &ulTmp);
PciRead32(SSX31B_REG_RQS3, &ulTmp1);
PciRead32(SSX31B_REG_RQRP3, &ulTmp2);
PciRead32(SSX31B_REG_RQWP3, &ulTmp3);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "RQBA3", REG_ADDR(SSX31B_REG_RQBA3), ulTmp);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "RQS3", REG_ADDR(SSX31B_REG_RQS3), ulTmp1);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "RQRP3", REG_ADDR(SSX31B_REG_RQRP3), ulTmp2);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "RQWP3", REG_ADDR(SSX31B_REG_RQWP3), ulTmp3);
PciRead32(SSX31B_REG_DMACTRL3, &ulTmp);
PciRead32(SSX31B_REG_PDLR3, &ulTmp1);
PciRead32(SSX31B_REG_BQTMOUT3, &ulTmp2);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "DMACTRL3", REG_ADDR(SSX31B_REG_DMACTRL3), ulTmp);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "BQTMOUT3", REG_ADDR(SSX31B_REG_BQTMOUT3), ulTmp2);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "PDLR3", REG_ADDR(SSX31B_REG_PDLR3), ulTmp1);
PciRead32(SSX31B_REG_INT_MASK, &ulTmp);
PciRead32(SSX31B_REG_BQWP3, &ulTmp1);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "NT_MASK", REG_ADDR(SSX31B_REG_INT_MASK), ulTmp);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x\n", "QWP3", REG_ADDR(SSX31B_REG_BQWP3), ulTmp1);
PciRead32(SSX31B_REG_RNG_CTRL, &ulTmp);
pucBuffer += SPRINTF(pucBuffer, "\r\n%20s(%08x):%08x", "RNG_CTRL", REG_ADDR(SSX31B_REG_RNG_CTRL), ulTmp);
}
ULONG four_bytes_align (ULONG ulVirAddr)
{
u8 diff;
ULONG ulPhyAddr = virt_to_bus (ulVirAddr);
diff = (ulPhyAddr & 0xFFFFFFFc) + 4 - ulPhyAddr;
ulVirAddr += diff;
return ulVirAddr;
}
ULONG four_bytes_align_en (ULONG ulBusAddr, ULONG ulVirAddr)
{
u8 diff;
diff = (ulBusAddr & 0xFFFFFFFc) + 4 - ulBusAddr;
ulVirAddr += diff;
return ulVirAddr;
}
VOID SSX31B_Release(SSX31BDRV_CTRL * pDrvCtrl)
{
// Free (pDrvCtrl->ulMemBase);
consistent_free((void*)pDrvCtrl->ulMemBase,pDrvCtrl->ulMemSize,(dma_addr_t)(pDrvCtrl->ulMemBase_dmaaddr));
/*toyinfo*/
#ifdef HI_DBG
printk("(IPSec,Sa,Pke) MemPool freed!\n");
#endif
// Free (pDrvCtrl->pstGather);
consistent_free((void*)pDrvCtrl->pstGather,pDrvCtrl->ulGatherSize,(dma_addr_t)(pDrvCtrl->pstGather_dmaaddr));
/*toyinfo*/
#ifdef HI_DBG
printk("IPSecICD MemPool freed!\n");
#endif
// Free (pDrvCtrl->ulCtrlWordMemBase);
consistent_free((void*)pDrvCtrl->ulCtrlWordMemBase,pDrvCtrl->ulCtrlWordSize,(dma_addr_t)(pDrvCtrl->ulCtrlWordMemBase_dmaaddr));
/*toyinfo*/
#ifdef HI_DBG
printk("IPSecCtrlWord MemPool freed!\n");
#endif
}
ULONG SSX31B_ReadReg(SSX31BDRV_CTRL * pDrvCtrl, ULONG ulOff, ULONG* pulValue)
{
PciRead32(ulOff, pulValue);
return OK;
}
ULONG SSX31B_WriteReg(SSX31BDRV_CTRL * pDrvCtrl, ULONG ulOff, ULONG ulValue )
{
PciWrite32(ulOff, ulValue);
return OK;
}
#ifdef __cplusplus
}
#endif
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -