pinliji.vhd

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--liwei
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity pinliji is
  port ( 
         start:in std_logic;                    --复位信号,高电平有效
         clk :in std_logic;                       --系统时钟
         check_clk:in std_logic;                  --外部输入被测信号
         data_led:out std_logic_vector(7 downto 0);    --八段码
         cs:out std_logic_vector(3 downto 0)); --数码管位选信号
end pinliji;

architecture behav of pinliji is
signal cnt1,cnt2,cnt3,cnt4,cnt5,cnt6,cnt7:std_logic_vector(3 downto 0);  --十进制计数器
signal bcd:std_logic_vector(3 downto 0);                   --BCD码寄存器
signal k1hz :integer range 0 to 50000000;    --秒分频系数
signal k_100hz: integer range 0 to 400000;    --8MS的信号                                                               
signal point : std_logic_vector(3 downto 0);                 --小数点
signal bcd0,bcd1,bcd2,bcd3 : std_logic_vector(3 downto 0); --寄存7位十进制计数器中有效的高4位数据  
signal en,bclk:std_logic;

begin
process(clk)     --此进程产生一个持续时间为一秒的的闸门信号 
begin
   if start='1' then k1hz<=0;
   elsif clk'event and clk='1' then 
     if k1hz<50000000  then k1hz<=k1hz+1;en<='1';
     else k1hz<=50000000;en<='0';
     end if;
   end if;
 end process;


and2:process(en,check_clk)    --此进程得到7位十进制计数器的计数脉冲
begin 
 bclk<=check_clk and en;
end process;

 
com:process(start,bclk)  --此进程完成对被测信号计脉冲数
begin
   if start='1' then 
   cnt1<="0000";cnt2<="0000";cnt3<="0000";cnt4<="0000";cnt5<="0000";cnt6<="0000";cnt7<="0000";  
   elsif  bclk'event and bclk='1' then  
     if cnt1="1001" then cnt1<="0000";                   --此IF语句完成个位十进制计数
        if cnt2="1001" then cnt2<="0000";                --此IF语句完成百位十进制计数
           if cnt3="1001" then cnt3<="0000";             --此IF语句完成千位十进制计数
              if cnt4="1001" then cnt4<="0000";          --此IF语句完成万位十进制计数
                 if cnt5="1001" THEN cnt5<="0000";       --此IF语句完成十万位十进制计数
                    if cnt6="1001" then cnt6<="0000";    --此IF语句完成百万位十进制计数
                       if cnt7="1001" then cnt7<="0000"; --此IF语句完成千万位十进制计数
                       else cnt7<=cnt7+1; 
                       end if;
                    else cnt6<=cnt6+1; 
                    end if;
                 else cnt5<=cnt5+1; 
                 end if;
              else cnt4<=cnt4+1; 
              end if;
           else cnt3<=cnt3+1; 
           end if;
        else cnt2<=cnt2+1;
        end if;
     else cnt1<=cnt1+1; 
     end if; 
  end if;

end process;

process(clk,en) --此进程把7位十进制计数器有效的高4位数据送如bcd0~3；并得到小数点信息
begin
  if rising_edge(clk) then 
     if en='0' then
        if cnt7>"0000" then bcd3<=cnt7; bcd2<=cnt6; bcd1<=cnt5; bcd0<=cnt4; point<="1110";
        elsif cnt6>"0000" then bcd3<=cnt6; bcd2<=cnt5; bcd1<=cnt4; bcd0<=cnt3; point<="1101";
        elsif cnt5>"0000" then bcd3<=cnt5; bcd2<=cnt4; bcd1<=cnt3; bcd0<=cnt2; point<="1011";
 	    else bcd3<=cnt4; bcd2<=cnt3; bcd1<=cnt2; bcd0<=cnt1; point<="0111";
	    end if;
     end if;
   end if;
end process;


process(clk)		--此进程完成数据的动态显示	 ,数据的赋植提前了一个时钟，原因是译码模块使得数据传输延迟了一个时钟；
begin
 if clk'event and clk='1' then
   if k_100hz<100000 then k_100hz<=k_100hz+1;bcd<=bcd3;cs<="1000";
     if point<="0111"	then  data_led(7)<='0';
     else 	data_led(7)<='1'; 	
     end if;
   elsif k_100hz<200000 then k_100hz<=k_100hz+1;bcd<=bcd2;cs<="0100";
     if point<="1011"	then  data_led(7)<='0';
     else 	data_led(7)<='1'; 	
     end if;
   elsif k_100hz<300000 then k_100hz<=k_100hz+1;bcd<=bcd1;cs<="0010";
     if point<="1101"	then  data_led(7)<='0';
     else 	data_led(7)<='1'; 	
     end if;
   elsif k_100hz<400000 then k_100hz<=k_100hz+1;bcd<=bcd0;cs<="0001";
     if point<="1110"	then  data_led(7)<='0';
     else 	data_led(7)<='1'; 	
     end if;
   else  k_100hz<=0;
  end if;
  end if;
end process;

process (bcd)              --译码 
  begin
        case bcd is
        when"0000"=>data_led(6 downto 0)<="1000000";--0
	    when"0001"=>data_led(6 downto 0)<="1111001";--1
	    when"0010"=>data_led(6 downto 0)<="0100100";--2
	    when"0011"=>data_led(6 downto 0)<="0110000";--3
	    when"0100"=>data_led(6 downto 0)<="0011001";--4
	    when"0101"=>data_led(6 downto 0)<="0010010";--5
	    when"0110"=>data_led(6 downto 0)<="0000010";--6
	    when"0111"=>data_led(6 downto 0)<="1111000";--7
	    when"1000"=>data_led(6 downto 0)<="0000000";--8
	    when"1001"=>data_led(6 downto 0)<="0010000";--9
	    when others=>data_led(6 downto 0)<="1111111";--No signal; 
       end case;
end process;

end behav;