sqrppgensgn.vhd

Cadence的VHDL运算库包

-------------------------------------------------------------------------------
-- Title       : Partial-product generator for signed squarer
-- Project     : VHDL Library of Arithmetic Units
-------------------------------------------------------------------------------
-- File        : SqrPPGenSgn.vhd
-- Author      : Reto Zimmermann  <[e-mail]>
-- Company     : Integrated Systems Laboratory, ETH Zurich
-- Date        : 1997/11/14
-------------------------------------------------------------------------------
-- Copyright (c) 1998 Integrated Systems Laboratory, ETH Zurich
-------------------------------------------------------------------------------
-- Description :
-- Partial-product generator for signed squarer.
--
-- Partial products for 4-bit squaring:
--
--  ~x(7) ~x(2)y(3) ~x(1)y(3) ~x(0)y(3)  x(0)y(2)  x(0)y(1)         0  x(0)y(0)
--      1  x(3)y(3)         0  x(1)y(2)      x(7)  x(1)y(1)         0         0
--      0         0         0  x(2)y(2)      x(7)         0         0         0
-------------------------------------------------------------------------------
--   p(7)      p(6)      p(5)      p(4)      p(3)      p(2)      p(1)      p(0)
-------------------------------------------------------------------------------

library ieee;
use ieee.std_logic_1164.all;
library arith_lib;
use arith_lib.arith_lib.all;

-------------------------------------------------------------------------------

entity SqrPPGenSgn is

  generic (width : positive := 8);	-- word width

  port (X : in std_logic_vector(width-1 downto 0);  -- operand
						    -- partial products
        PP : out std_logic_vector((width/2+1)*2*width-1 downto 0));

end SqrPPGenSgn;

-------------------------------------------------------------------------------

architecture Structural of SqrPPGenSgn is 

  constant widthP : positive := 2*width;  -- width of single part. product

begin

  ppGen : process (X)
    variable ppt : std_logic_vector((width/2+1)*widthP-1 downto 0);
  begin

    -- defaults
    ppt := (others => '0');

    -- lower products x(i)x(k), i /= k
    for i in 0 to (width-1)/2-1 loop
      for k in i+1 to width-i-2 loop
	ppt(i*widthP+i+k+1) := X(i) and X(k);
      end loop;
    end loop;
    
    -- upper products x(i)x(k), i /= k
    for k in 0 to width-2 loop
      ppt(width+k) := not X(k) and X(width-1);
    end loop;
    for i in 1 to width/2-1 loop
      for k in i to width-i-2 loop
	ppt(i*widthP+width-i+k) := X(k) and X(width-i-1);
      end loop;
    end loop;

    -- lower products x(i)x(i)
    for i in 0 to (width-1)/2 loop
      ppt(i*widthP+2*i) := X(i);
    end loop;

    -- upper products x(i)x(i)
    for i in 1 to width/2 loop
      ppt(i*widthP+2*width-2*i) := X(width-i);
    end loop;

    -- correction terms
    ppt(widthP-1) := not X(width-1);
    ppt(2*widthP-1) := '1';
    if width mod 2 = 0 then
      ppt((width/2-1)*widthP+width-1) := X(width-1);
      ppt((width/2)*widthP+width-1) := X(width-1);
    else
      ppt((width/2)*widthP+width) := X(width-1);
    end if;
    
    PP <= ppt;

  end process ppGen;

end Structural;

-------------------------------------------------------------------------------