prefixandor.vhd

Cadence的VHDL运算库包

-------------------------------------------------------------------------------
-- Title       : Parallel-prefix AND-OR structure
-- Project     : VHDL Library of Arithmetic Units
-------------------------------------------------------------------------------
-- File        : PrefixAndOr.vhd
-- Author      : Reto Zimmermann  <[e-mail]>
-- Company     : Integrated Systems Laboratory, ETH Zurich
-- Date        : 1997/11/04
-------------------------------------------------------------------------------
-- Copyright (c) 1998 Integrated Systems Laboratory, ETH Zurich
-------------------------------------------------------------------------------
-- Description :
-- Prefix structures of different depth (i.e. speed) for carry calculation
-- in binary adders. Compute in m levels new generate/propagate signal pairs
-- for always larger groups of bits. Generate signals of last level correspond
-- to carries in binary addition.  Basic logic operations: AND-OR for generate
-- signals, AND for propagate signals.
-------------------------------------------------------------------------------

library ieee;
use ieee.std_logic_1164.all;
library arith_lib;
use arith_lib.arith_lib.all;
use arith_lib.arith_utils.all;

-------------------------------------------------------------------------------

entity PrefixAndOr is

  generic (width : positive := 8;	-- word width
	   speed : speedType := fast);	-- performance parameter

  port (GI, PI : in std_logic_vector(width-1 downto 0);  -- gen./prop. in
	GO, PO : out std_logic_vector(width-1 downto 0));  -- gen./prop. out

end PrefixAndOr;

-------------------------------------------------------------------------------

architecture Structural of PrefixAndOr is 

  constant n : positive := width;	-- prefix structure width
  constant m : positive := log2ceil(width);  -- prefix structure depth

begin

  -- Sklansky parallel-prefix carry-lookahead structure
  fastPrefix : if speed = fast generate
    local : block
      signal GT, PT : std_logic_vector((m+1)*n-1 downto 0); -- gen./prop. temp
    begin
      GT(n-1 downto 0) <= GI;
      PT(n-1 downto 0) <= PI;
      levels : for l in 1 to m generate
	groups : for k in 0 to 2**(m-l) - 1 generate
	  bits : for i in 0 to 2**(l-1) - 1 generate
	    white : if (k*2**l + i) < n generate
	      GT(l*n + k*2**l + i) <= GT((l-1)*n + k*2**l + i);
	      PT(l*n + k*2**l + i) <= PT((l-1)*n + k*2**l + i);
	    end generate white;
	    black : if (k*2**l + 2**(l-1) + i) < n generate
	      GT(l*n + k*2**l + 2**(l-1) + i) <= 
		GT((l-1)*n + k*2**l + 2**(l-1) + i) or
		(PT((l-1)*n + k*2**l + 2**(l-1) + i) and
		 GT((l-1)*n + k*2**l + 2**(l-1) - 1));
	      PT(l*n + k*2**l + 2**(l-1) + i) <= 
		PT((l-1)*n + k*2**l + 2**(l-1) + i) and
		PT((l-1)*n + k*2**l + 2**(l-1) - 1);
	    end generate black;
	  end generate bits;
	end generate groups;
      end generate levels;
      GO <= GT((m+1)*n-1 downto m*n);
      PO <= PT((m+1)*n-1 downto m*n);
    end block local;
  end generate fastPrefix;

  -- Brent-Kung parallel-prefix carry-lookahead structure
  mediumPrefix : if speed = medium generate
    local : block
      signal GT, PT : std_logic_vector((2*m)*n-1 downto 0); -- gen./prop. temp
    begin
      GT(n-1 downto 0) <= GI;
      PT(n-1 downto 0) <= PI;
      levels1 : for l in 1 to m generate
	groups : for k in 0 to 2**(m-l) - 1 generate
	  bits : for i in 0 to 2**l - 2 generate
	    white : if (k*2**l + i) < n generate
	      GT(l*n + k*2**l + i) <= GT((l-1)*n + k*2**l + i);
	      PT(l*n + k*2**l + i) <= PT((l-1)*n + k*2**l + i);
	    end generate white;
	  end generate bits;
	  black : if (k*2**l + 2**l - 1) < n generate
	    GT(l*n + k*2**l + 2**l - 1) <= 
	      GT((l-1)*n + k*2**l + 2**l - 1) or
	      (PT((l-1)*n + k*2**l + 2**l - 1) and
	       GT((l-1)*n + k*2**l + 2**(l-1) - 1));
	    PT(l*n + k*2**l + 2**l - 1) <= 
	      PT((l-1)*n + k*2**l + 2**l - 1) and
	      PT((l-1)*n + k*2**l + 2**(l-1) - 1);
	  end generate black;
	end generate groups;
      end generate levels1;
      levels2 : for l in m + 1 to 2*m - 1 generate
	bits : for i in 0 to 2**(2*m-l) - 1 generate
	  white : if i < n generate
	    GT(l*n + i) <= GT((l-1)*n + i);
	    PT(l*n + i) <= PT((l-1)*n + i);
	  end generate white;
	end generate bits;
	groups : for k in 1 to 2**(l-m) - 1 generate
	  empty : if l < 2*m - 1 generate
	    bits : for i in 0 to 2**(2*m-l-1) - 2 generate
	      white : if (k*2**(2*m-l) + i) < n generate
		GT(l*n + k*2**(2*m-l) + i) <= GT((l-1)*n + k*2**(2*m-l) + i);
		PT(l*n + k*2**(2*m-l) + i) <= PT((l-1)*n + k*2**(2*m-l) + i);
	      end generate white;
	    end generate bits;
	  end generate empty;
	  black : if (k*2**(2*m-l) + 2**(2*m-l-1) - 1) < n generate
	    GT(l*n + k*2**(2*m-l) + 2**(2*m-l-1) - 1) <= 
	      GT((l-1)*n + k*2**(2*m-l) + 2**(2*m-l-1) - 1) or
	      (PT((l-1)*n + k*2**(2*m-l) + 2**(2*m-l-1) - 1) and
	       GT((l-1)*n + k*2**(2*m-l) - 1));
	    PT(l*n + k*2**(2*m-l) + 2**(2*m-l-1) - 1) <= 
	      PT((l-1)*n + k*2**(2*m-l) + 2**(2*m-l-1) - 1) and
	      PT((l-1)*n + k*2**(2*m-l) - 1);
	  end generate black;
	  bits : for i in 2**(2*m-l-1) to 2**(2*m-l) - 1 generate
	    white : if ( k*2**(2*m-l) + i) < n generate
	      GT(l*n + k*2**(2*m-l) + i) <= GT((l-1)*n + k*2**(2*m-l) + i);
	      PT(l*n + k*2**(2*m-l) + i) <= PT((l-1)*n + k*2**(2*m-l) + i);
	    end generate white;
	  end generate bits;	
	end generate groups;
      end generate levels2;
      GO <= GT(2*m*n-1 downto (2*m-1)*n);
      PO <= PT(2*m*n-1 downto (2*m-1)*n);
    end block local;
  end generate mediumPrefix;

  -- serial-prefix carry-lookahead structure
  slowPrefix : if speed = slow generate
    local : block
      signal GT, PT : std_logic_vector(n-1 downto 0); -- gen./prop. temp
    begin
      GT(0) <= GI(0);
      PT(0) <= PI(0);
      bits : for i in 1 to n - 1 generate
	GT(i) <= GI(i) or (PI(i) and GT(i-1));
	PT(i) <= PI(i) and PT(i-1);
      end generate bits;
      GO <= GT;
      PO <= PT;
    end block local;
  end generate slowPrefix;

end Structural;

-------------------------------------------------------------------------------