fpga_seg7_v4.qsf

FPGA应用如sd卡控制

# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		FPGA_SEG7_V4_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C35F484C8
set_global_assignment -name TOP_LEVEL_ENTITY FPGA_SEG7_V4
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "5.1 SP2"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:11:47  SEPTEMBER 25, 2007"
set_global_assignment -name LAST_QUARTUS_VERSION 5.1
set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 484
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name BDF_FILE FPGA_SEG7_V4.bdf
set_global_assignment -name VHDL_FILE segmain.vhd
set_global_assignment -name VHDL_FILE bin27seg.vhd
set_global_assignment -name VHDL_FILE addcont.vhd
set_global_assignment -name VHDL_FILE subcont.vhd
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_location_assignment PIN_L1 -to clk
set_location_assignment PIN_U12 -to reset
set_location_assignment PIN_G20 -to ledcom[0]
set_location_assignment PIN_H14 -to ledcom[1]
set_location_assignment PIN_H17 -to ledcom[2]
set_location_assignment PIN_H18 -to ledcom[3]
set_location_assignment PIN_J14 -to ledcom[4]
set_location_assignment PIN_H19 -to ledcom[5]
set_location_assignment PIN_H16 -to ledcom[6]
set_location_assignment PIN_H15 -to ledcom[7]
set_location_assignment PIN_J18 -to leddata[0]
set_location_assignment PIN_J19 -to leddata[1]
set_location_assignment PIN_J17 -to leddata[2]
set_location_assignment PIN_J15 -to leddata[3]
set_location_assignment PIN_N15 -to leddata[4]
set_location_assignment PIN_J20 -to leddata[5]
set_location_assignment PIN_P15 -to leddata[6]
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_global_assignment -name STRATIX_CONFIGURATION_DEVICE EPCS16
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"