📄 pwm_led.map.qmsg
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 171 11/03/2005 Service Pack 2 SJ Full Version " "Info: Version 5.0 Build 171 11/03/2005 Service Pack 2 SJ Full Version" { } { } 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Aug 23 21:47:26 2006 " "Info: Processing started: Wed Aug 23 21:47:26 2006" { } { } 0} } { } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off pwm_led -c pwm_led " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off pwm_led -c pwm_led" { } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../test/pwm_led.v 3 3 " "Info: Found 3 design units, including 3 entities, in source file ../../test/pwm_led.v" { { "Info" "ISGN_ENTITY_NAME" "1 pwm_led " "Info: Found entity 1: pwm_led" { } { { "../../test/pwm_led.v" "" { Text "E:/zhangwei/fpga_pro/test/pwm_led.v" 13 -1 0 } } } 0} { "Info" "ISGN_ENTITY_NAME" "2 led " "Info: Found entity 2: led" { } { { "../../test/pwm_led.v" "" { Text "E:/zhangwei/fpga_pro/test/pwm_led.v" 188 -1 0 } } } 0} { "Info" "ISGN_ENTITY_NAME" "3 pwm " "Info: Found entity 3: pwm" { } { { "../../test/pwm_led.v" "" { Text "E:/zhangwei/fpga_pro/test/pwm_led.v" 232 -1 0 } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "pwm_led " "Info: Elaborating entity \"pwm_led\" for the top level hierarchy" { } { } 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "up pwm_led.v(21) " "Info: (10035) Verilog HDL or VHDL information at pwm_led.v(21): object \"up\" declared but not used" { } { { "../../test/pwm_led.v" "" { Text "E:/zhangwei/fpga_pro/test/pwm_led.v" 21 0 0 } } } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 pwm_led.v(33) " "Warning: Verilog HDL assignment warning at pwm_led.v(33): truncated value with size 32 to match size of target (8)" { } { { "../../test/pwm_led.v" "" { Text "E:/zhangwei/fpga_pro/test/pwm_led.v" 33 0 0 } } } 0}
{ "Warning" "WVRFX_VERI_CASE_ITEM_EXPR_TOO_LARGE" "32 5 pwm_led.v(39) " "Warning: (10271) Verilog HDL Case Statement warning at pwm_led.v(39): size of case item expression (32) exceeds the size of the case expression (5)" { } { { "../../test/pwm_led.v" "" { Text "E:/zhangwei/fpga_pro/test/pwm_led.v" 39 0 0 } } } 0}
{ "Warning" "WVRFX_VERI_CASE_ITEM_EXPR_TOO_LARGE" "32 5 pwm_led.v(40) " "Warning: (10271) Verilog HDL Case Statement warning at pwm_led.v(40): size of case item expression (32) exceeds the size of the case expression (5)" { } { { "../../test/pwm_led.v" "" { Text "E:/zhangwei/fpga_pro/test/pwm_led.v" 40 0 0 } } } 0}
{ "Warning" "WVRFX_VERI_CASE_ITEM_EXPR_TOO_LARGE" "32 5 pwm_led.v(41) " "Warning: (10271) Verilog HDL Case Statement warning at pwm_led.v(41): size of case item expression (32) exceeds the size of the case expression (5)" { } { { "../../test/pwm_led.v" "" { Text "E:/zhangwei/fpga_pro/test/pwm_led.v" 41 0 0 } } } 0}
{ "Warning" "WVRFX_VERI_CASE_ITEM_EXPR_TOO_LARGE" "32 5 pwm_led.v(42) " "Warning: (10271) Verilog HDL Case Statement warning at pwm_led.v(42): size of case item expression (32) exceeds the size of the case expression (5)" { } { { "../../test/pwm_led.v" "" { Text "E:/zhangwei/fpga_pro/test/pwm_led.v" 42 0 0 } } } 0}
{ "Warning" "WVRFX_VERI_CASE_ITEM_EXPR_TOO_LARGE" "32 5 pwm_led.v(43) " "Warning: (10271) Verilog HDL Case Statement warning at pwm_led.v(43): size of case item expression (32) exceeds the size of the case expression (5)" { } { { "../../test/pwm_led.v" "" { Text "E:/zhangwei/fpga_pro/test/pwm_led.v" 43 0 0 } } } 0}
{ "Warning" "WVRFX_VERI_CASE_ITEM_EXPR_TOO_LARGE" "32 5 pwm_led.v(44) " "Warning: (10271) Verilog HDL Case Statement warning at pwm_led.v(44): size of case item expression (32) exceeds the size of the case expression (5)" { } { { "../../test/pwm_led.v" "" { Text "E:/zhangwei/fpga_pro/test/pwm_led.v" 44 0 0 } } } 0}
{ "Warning" "WVRFX_VERI_CASE_ITEM_EXPR_TOO_LARGE" "32 5 pwm_led.v(45) " "Warning: (10271) Verilog HDL Case Statement warning at pwm_led.v(45): size of case item expression (32) exceeds the size of the case expression (5)" { } { { "../../test/pwm_led.v" "" { Text "E:/zhangwei/fpga_pro/test/pwm_led.v" 45 0 0 } } } 0}
{ "Warning" "WVRFX_VERI_CASE_ITEM_EXPR_TOO_LARGE" "32 5 pwm_led.v(46) " "Warning: (10271) Verilog HDL Case Statement warning at pwm_led.v(46): size of case item expression (32) exceeds the size of the case expression (5)" { } { { "../../test/pwm_led.v" "" { Text "E:/zhangwei/fpga_pro/test/pwm_led.v" 46 0 0 } } } 0}
{ "Warning" "WVRFX_VERI_CASE_ITEM_EXPR_TOO_LARGE" "32 5 pwm_led.v(47) " "Warning: (10271) Verilog HDL Case Statement warning at pwm_led.v(47): size of case item expression (32) exceeds the size of the case expression (5)" { } { { "../../test/pwm_led.v" "" { Text "E:/zhangwei/fpga_pro/test/pwm_led.v" 47 0 0 } } } 0}
{ "Warning" "WVRFX_VERI_CASE_ITEM_EXPR_TOO_LARGE" "32 5 pwm_led.v(48) " "Warning: (10271) Verilog HDL Case Statement warning at pwm_led.v(48): size of case item expression (32) exceeds the size of the case expression (5)" { } { { "../../test/pwm_led.v" "" { Text "E:/zhangwei/fpga_pro/test/pwm_led.v" 48 0 0 } } } 0}
{ "Warning" "WVRFX_VERI_CASE_ITEM_EXPR_TOO_LARGE" "32 5 pwm_led.v(49) " "Warning: (10271) Verilog HDL Case Statement warning at pwm_led.v(49): size of case item expression (32) exceeds the size of the case expression (5)" { } { { "../../test/pwm_led.v" "" { Text "E:/zhangwei/fpga_pro/test/pwm_led.v" 49 0 0 } } } 0}
{ "Warning" "WVRFX_VERI_CASE_ITEM_EXPR_TOO_LARGE" "32 5 pwm_led.v(50) " "Warning: (10271) Verilog HDL Case Statement warning at pwm_led.v(50): size of case item expression (32) exceeds the size of the case expression (5)" { } { { "../../test/pwm_led.v" "" { Text "E:/zhangwei/fpga_pro/test/pwm_led.v" 50 0 0 } } } 0}
{ "Warning" "WVRFX_VERI_CASE_ITEM_EXPR_TOO_LARGE" "32 5 pwm_led.v(51) " "Warning: (10271) Verilog HDL Case Statement warning at pwm_led.v(51): size of case item expression (32) exceeds the size of the case expression (5)" { } { { "../../test/pwm_led.v" "" { Text "E:/zhangwei/fpga_pro/test/pwm_led.v" 51 0 0 } } } 0}
{ "Warning" "WVRFX_VERI_CASE_ITEM_EXPR_TOO_LARGE" "32 5 pwm_led.v(52) " "Warning: (10271) Verilog HDL Case Statement warning at pwm_led.v(52): size of case item expression (32) exceeds the size of the case expression (5)" { } { { "../../test/pwm_led.v" "" { Text "E:/zhangwei/fpga_pro/test/pwm_led.v" 52 0 0 } } } 0}
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