frequencycount.sim.rpt

FPGA设计频率计全套资料

; Group bus channels in simulation results                                                   ; Off                              ; Off           ;
; Preserve fewer signal transitions to reduce memory requirements                            ; On                               ; On            ;
; Trigger vector comparison with the specified mode                                          ; INPUT_EDGE                       ; INPUT_EDGE    ;
; Disable setup and hold time violations detection in input registers of bi-directional pins ; Off                              ; Off           ;
; Overwrite Waveform Inputs With Simulation Outputs                                          ; On                               ;               ;
; Glitch Filtering                                                                           ; Off                              ; Off           ;
+--------------------------------------------------------------------------------------------+----------------------------------+---------------+


+----------------------+
; Simulation Waveforms ;
+----------------------+
Waveform report data cannot be output to ASCII.
Please use Quartus II to view the waveform report data.


+--------------------------------------------------------------------+
; Coverage Summary                                                   ;
+-----------------------------------------------------+--------------+
; Type                                                ; Value        ;
+-----------------------------------------------------+--------------+
; Total coverage as a percentage                      ;      59.55 % ;
; Total nodes checked                                 ; 1318         ;
; Total output ports checked                          ; 1377         ;
; Total output ports with complete 1/0-value coverage ; 820          ;
; Total output ports with no 1/0-value coverage       ; 514          ;
; Total output ports with no 1-value coverage         ; 519          ;
; Total output ports with no 0-value coverage         ; 552          ;
+-----------------------------------------------------+--------------+


The following table displays output ports that toggle between 1 and 0 during simulation.
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Complete 1/0-Value Coverage                                                                                                                                                                                                   ;
+---------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+------------------+
; Node Name                                                                                         ; Output Port Name                                                                                       ; Output Port Type ;
+---------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+------------------+
; |frequencycount|20mclk                                                                            ; |frequencycount|20mclk                                                                                 ; out              ;
; |frequencycount|CLK_TEST                                                                          ; |frequencycount|CLK_TEST                                                                               ; out              ;
; |frequencycount|CLK1MHZ                                                                           ; |frequencycount|CLK1MHZ                                                                                ; pin_out          ;
; |frequencycount|DEVIDEFRE10                                                                       ; |frequencycount|DEVIDEFRE10                                                                            ; pin_out          ;
; |frequencycount|CLK_SE                                                                            ; |frequencycount|CLK_SE                                                                                 ; out              ;
; |frequencycount|SEL                                                                               ; |frequencycount|SEL                                                                                    ; out              ;
; |frequencycount|FRECODE[1]                                                                        ; |frequencycount|FRECODE[1]                                                                             ; pin_out          ;
; |frequencycount|FRECODE[0]                                                                        ; |frequencycount|FRECODE[0]                                                                             ; pin_out          ;
; |frequencycount|RESULT[3]                                                                         ; |frequencycount|RESULT[3]                                                                              ; pin_out          ;
; |frequencycount|RESULT[2]                                                                         ; |frequencycount|RESULT[2]                                                                              ; pin_out          ;
; |frequencycount|RESULT[1]                                                                         ; |frequencycount|RESULT[1]                                                                              ; pin_out          ;
; |frequencycount|RESULTH[2]                                                                        ; |frequencycount|RESULTH[2]                                                                             ; pin_out          ;
; |frequencycount|RESULTH[1]                                                                        ; |frequencycount|RESULTH[1]                                                                             ; pin_out          ;
; |frequencycount|PULSEINT                                                                          ; |frequencycount|PULSEINT                                                                               ; pin_out          ;
; |frequencycount|PULSEINT:inst14|COUNT[0]                                                          ; |frequencycount|PULSEINT:inst14|COUNT[0]                                                               ; out              ;
; |frequencycount|PULSEINT:inst14|COUNT~0                                                           ; |frequencycount|PULSEINT:inst14|COUNT~0                                                                ; out              ;
; |frequencycount|PULSEINT:inst14|COUNT~1                                                           ; |frequencycount|PULSEINT:inst14|COUNT~1                                                                ; out              ;
; |frequencycount|PULSEINT:inst14|COUNT~2                                                           ; |frequencycount|PULSEINT:inst14|COUNT~2                                                                ; out              ;
; |frequencycount|PULSEINT:inst14|COUNT~3                                                           ; |frequencycount|PULSEINT:inst14|COUNT~3                                                                ; out              ;
; |frequencycount|PULSEINT:inst14|COUNT~4                                                           ; |frequencycount|PULSEINT:inst14|COUNT~4                                                                ; out              ;
; |frequencycount|PULSEINT:inst14|COUNT~5                                                           ; |frequencycount|PULSEINT:inst14|COUNT~5                                                                ; out              ;
; |frequencycount|PULSEINT:inst14|COUNT~6                                                           ; |frequencycount|PULSEINT:inst14|COUNT~6                                                                ; out              ;
; |frequencycount|PULSEINT:inst14|COUNT~7                                                           ; |frequencycount|PULSEINT:inst14|COUNT~7                                                                ; out              ;
; |frequencycount|PULSEINT:inst14|POT                                                               ; |frequencycount|PULSEINT:inst14|POT                                                                    ; out              ;
; |frequencycount|PULSEINT:inst14|process2~0                                                        ; |frequencycount|PULSEINT:inst14|process2~0                                                             ; out0             ;
; |frequencycount|PULSEINT:inst14|process2~1                                                        ; |frequencycount|PULSEINT:inst14|process2~1                                                             ; out0             ;
; |frequencycount|PULSEINT:inst14|POT~0                                                             ; |frequencycount|PULSEINT:inst14|POT~0                                                                  ; out              ;
; |frequencycount|PULSEINT:inst14|POT~1                                                             ; |frequencycount|PULSEINT:inst14|POT~1                                                                  ; out              ;
; |frequencycount|PULSEINT:inst14|COUNT[1]                                                          ; |frequencycount|PULSEINT:inst14|COUNT[1]                                                               ; out              ;
; |frequencycount|PULSEINT:inst14|COUNT[2]                                                          ; |frequencycount|PULSEINT:inst14|COUNT[2]                                                               ; out              ;
; |frequencycount|PULSEINT:inst14|COUNT[3]                                                          ; |frequencycount|PULSEINT:inst14|COUNT[3]                                                               ; out              ;
; |frequencycount|PULSEINT:inst14|EN                                                                ; |frequencycount|PULSEINT:inst14|EN                                                                     ; out              ;
; |frequencycount|SREG:inst13|TEMP~42                                                               ; |frequencycount|SREG:inst13|TEMP~42                                                                    ; out              ;
; |frequencycount|SREG:inst13|TEMP~43                                                               ; |frequencycount|SREG:inst13|TEMP~43                                                                    ; out              ;
; |frequencycount|SREG:inst13|TEMP~44                                                               ; |frequencycount|SREG:inst13|TEMP~44                                                                    ; out              ;
; |frequencycount|SREG:inst13|TEMP~45                                                               ; |frequencycount|SREG:inst13|TEMP~45                                                                    ; out              ;