produce.map.summary

vhdl的一个串行序列信号发生器的设计与实现

Analysis & Synthesis Status : Successful - Sat Jul 15 21:10:27 2006
Quartus II Version : 5.1 Build 176 10/26/2005 SJ Full Version
Revision Name : produce
Top-level Entity Name : produce
Family : MAX7000S
Total macrocells : 19
Total pins : 13