irq.v

DE1-FPGA-Board

//
// FPGA PACMAN IRQ / vector handler
//
// Version : beta2
//
// Copyright(c) 2002,2003 Tatsuyuki Satoh , All rights reserved
//
// Important !
//
// This program is freeware for non-commercial use. 
// An author does no guarantee about this program.
// You can use this under your own risk. 
//
// 2003. 2. 6 beta2 bugfix IRQ vector size
//

module irq(n_M1,n_IORQ,n_WR,IRQEN,IRQTRG,DI,n_IRQ,DO,DE);

input n_M1;
input n_IORQ;
input n_WR;
input IRQEN;
input IRQTRG;
input [7:0] DI;
output n_IRQ;
output [7:0] DO;
output DE;

// ---------- for T80 bugfix >>>>>>>>>>
// latched M1 , for T80 Bug!!
reg m1l;
always @(negedge n_IORQ) m1l <= n_M1;

wire iocycle_n = n_IORQ | ~n_M1 | ~m1l;
wire spcycle_n = n_IORQ |  m1l;
//wire iocycle_n = n_IORQ | ~n_M1;
//wire spcycle_n = n_IORQ |  n_M1;
// ---------- for T80 bugfix <<<<<<<<<<<

//
// I/O write -> set vector
//
reg [7:0] vector_latch;
always @(posedge iocycle_n) vector_latch <= DI;

//
// special M1 cycle  = vector out
//
assign DE = ~spcycle_n;
assign DO = DE ? vector_latch : 8'h00;

//
// IRQ signal
//
reg irq_latch;
always @(posedge IRQTRG or negedge IRQEN)
begin
	if(IRQEN==0) //enable fall
		irq_latch <= 1'b1; //clear
	else // trigger fall
		irq_latch <= 1'b0; //enable
end
assign n_IRQ = irq_latch;

endmodule