qregister.vhd

the booth algorithm to implement the 32bits multiplication.

library IEEE;
use IEEE.std_logic_1164.all;

entity QRegister is 
port( op: in std_logic_vector(1 downto 0);
      clk: in std_logic;
      sr: in std_logic;
      din: in std_logic_vector(31 downto 0);
      q0: out std_logic; 
      dout: out std_logic_vector(31 downto 0)
      );
end QRegister;

architecture behav of QRegister is
signal data: std_logic_vector(32 downto 0);
signal olddata: std_logic_vector(32 downto 0);
signal qinit: std_logic := '0';

begin
reg: process(clk)
begin
    if (clk'event and clk = '1') then
        if (op = "01") then
            olddata(32) <= sr;
            olddata(31 downto 0) <= data(31 downto 0);
            data <= (32 downto 32 => '0') & olddata(32 downto 1);
        elsif (op = "10" or op = "11") then
            data(32 downto 1) <= din;
            data(0) <= qinit;
        end if;
        
        dout <= data(32 downto 1);
        q0 <= data(0);
    end if;
end process;
end behav;