sdrm.syr

这是我从网上找到的用vhdl语言写的sdram控制器的代码。我的邮箱：[e-mail]

    Summary:
	inferred  68 D-type flip-flop(s).
Unit <sys_int> synthesized.


Synthesizing Unit <sdrm_t>.
    Related source file is C:/Xilinx/ise_work/buzhidao/sdrm_t.vhd.
WARNING:Xst:646 - Signal <ad_tri_reg> is assigned but never used.
WARNING:Xst:646 - Signal <sd_brst> is assigned but never used.
WARNING:Xst:646 - Signal <ad_tri_ref> is assigned but never used.
    Found 1-bit register for signal <sd_ba_o>.
    Found 4-bit register for signal <sd_doe_n>.
    Found 1-bit register for signal <sd_we_o>.
    Found 11-bit register for signal <sd_add_o>.
    Found 1-bit register for signal <sd_ras_o>.
    Found 1-bit register for signal <ready_o>.
    Found 1-bit register for signal <sd_cas_o>.
    Found 1-bit register for signal <clr_ref_d>.
    Found 1-bit register for signal <ld_brst>.
    Found 1-bit register for signal <ld_cslt>.
    Found 1-bit register for signal <ld_rcd>.
    Found 1-bit register for signal <Locked_i_int>.
    Found 1-bit register for signal <sd_add_mx>.
    Found 11 1-bit 2-to-1 multiplexers.
    Summary:
	inferred  26 D-type flip-flop(s).
	inferred  11 Multiplexer(s).
Unit <sdrm_t> synthesized.


Synthesizing Unit <sdrm>.
    Related source file is C:/Xilinx/ise_work/buzhidao/sdrm.vhd.
WARNING:Xst:646 - Signal <Locked_j> is assigned but never used.
WARNING:Xst:653 - Signal <sd_cs1_o> is used but never assigned. Tied to value 0.
WARNING:Xst:653 - Signal <sd_cs2_o> is used but never assigned. Tied to value 0.
WARNING:Xst:646 - Signal <auto_ref_out> is assigned but never used.
WARNING:Xst:653 - Signal <auto_ref_in> is used but never assigned. Tied to value 0.
WARNING:Xst:646 - Signal <unused1> is assigned but never used.
WARNING:Xst:646 - Signal <unused2> is assigned but never used.
WARNING:Xst:646 - Signal <unused3> is assigned but never used.
WARNING:Xst:646 - Signal <rcd_end> is assigned but never used.
WARNING:Xst:653 - Signal <sd_cke_o> is used but never assigned. Tied to value 1.
WARNING:Xst:653 - Signal <sd_dqm_o> is used but never assigned. Tied to value 0000.
WARNING:Xst:646 - Signal <ready_o> is assigned but never used.
WARNING:Xst:1780 - Signal <logic0> is never used or assigned.
WARNING:Xst:1780 - Signal <logic1> is never used or assigned.
WARNING:Xst:646 - Signal <Add_reg<31:22>> is assigned but never used.
WARNING:Xst:646 - Signal <Add_reg<1:0>> is assigned but never used.
WARNING:Xst:646 - Signal <kid> is assigned but never used.
    Register <sd_data_t<30>> equivalent to <sd_data_t<31>> has been removed
    Register <sd_data_t<29>> equivalent to <sd_data_t<31>> has been removed
    Register <sd_data_t<28>> equivalent to <sd_data_t<31>> has been removed
    Register <sd_data_t<27>> equivalent to <sd_data_t<31>> has been removed
    Register <sd_data_t<26>> equivalent to <sd_data_t<31>> has been removed
    Register <sd_data_t<25>> equivalent to <sd_data_t<31>> has been removed
    Register <sd_data_t<24>> equivalent to <sd_data_t<31>> has been removed
    Register <sd_data_t<22>> equivalent to <sd_data_t<23>> has been removed
    Register <sd_data_t<21>> equivalent to <sd_data_t<23>> has been removed
    Register <sd_data_t<20>> equivalent to <sd_data_t<23>> has been removed
    Register <sd_data_t<19>> equivalent to <sd_data_t<23>> has been removed
    Register <sd_data_t<18>> equivalent to <sd_data_t<23>> has been removed
    Register <sd_data_t<17>> equivalent to <sd_data_t<23>> has been removed
    Register <sd_data_t<16>> equivalent to <sd_data_t<23>> has been removed
    Register <sd_data_t<14>> equivalent to <sd_data_t<15>> has been removed
    Register <sd_data_t<13>> equivalent to <sd_data_t<15>> has been removed
    Register <sd_data_t<12>> equivalent to <sd_data_t<15>> has been removed
    Register <sd_data_t<11>> equivalent to <sd_data_t<15>> has been removed
    Register <sd_data_t<10>> equivalent to <sd_data_t<15>> has been removed
    Register <sd_data_t<9>> equivalent to <sd_data_t<15>> has been removed
    Register <sd_data_t<8>> equivalent to <sd_data_t<15>> has been removed
    Register <sd_data_t<6>> equivalent to <sd_data_t<7>> has been removed
    Register <sd_data_t<5>> equivalent to <sd_data_t<7>> has been removed
    Register <sd_data_t<4>> equivalent to <sd_data_t<7>> has been removed
    Register <sd_data_t<3>> equivalent to <sd_data_t<7>> has been removed
    Register <sd_data_t<2>> equivalent to <sd_data_t<7>> has been removed
    Register <sd_data_t<1>> equivalent to <sd_data_t<7>> has been removed
    Register <sd_data_t<0>> equivalent to <sd_data_t<7>> has been removed
    Found 32-bit register for signal <AD_o>.
    Found 32-bit register for signal <AD_reg>.
    Found 1-bit register for signal <data_addr_n_reg>.
    Found 11-bit register for signal <sd_add_o>.
    Found 1-bit register for signal <sd_ba_o>.
    Found 1-bit register for signal <sd_cas_o>.
    Found 32-bit register for signal <sd_data_o>.
    Found 32-bit register for signal <sd_data_R>.
    Found 1-bit register for signal <sd_data_t<31>>.
    Found 1-bit register for signal <sd_data_t<23>>.
    Found 1-bit register for signal <sd_data_t<15>>.
    Found 1-bit register for signal <sd_data_t<7>>.
    Found 4-bit register for signal <sd_doe_n>.
    Found 1-bit register for signal <sd_ras_o>.
    Found 1-bit register for signal <sd_we_o>.
    Found 1-bit register for signal <we_rn_reg>.
    Summary:
	inferred 153 D-type flip-flop(s).
Unit <sdrm> synthesized.


=========================================================================
*                       Advanced HDL Synthesis                          *
=========================================================================

Advanced RAM inference ...
Advanced multiplier inference ...
Advanced Registered AddSub inference ...
Selecting encoding for FSM_0 ...
Optimizing FSM <FSM_0> on signal <state> with one-hot encoding.
Dynamic shift register inference ...

=========================================================================
HDL Synthesis Report

Macro Statistics
# FSMs                             : 1
# Adders/Subtractors               : 5
 16-bit subtractor                 : 1
 3-bit subtractor                  : 1
 2-bit subtractor                  : 2
 4-bit subtractor                  : 1
# Registers                        : 54
 4-bit register                    : 3
 11-bit register                   : 2
 1-bit register                    : 37
 32-bit register                   : 7
 3-bit register                    : 2
 2-bit register                    : 2
 16-bit register                   : 1
# Multiplexers                     : 7
 11-bit 2-to-1 multiplexer         : 1
 2-bit 2-to-1 multiplexer          : 2
 3-bit 2-to-1 multiplexer          : 1
 16-bit 2-to-1 multiplexer         : 2
 4-bit 2-to-1 multiplexer          : 1

=========================================================================

=========================================================================
*                         Low Level Synthesis                           *
=========================================================================
WARNING:Xst:1291 - FF/Latch <we_rn_reg> is unconnected in block <sdrm>.
WARNING:Xst:1291 - FF/Latch <ready_o> is unconnected in block <sdrm_t_int>.
WARNING:Xst:1291 - FF/Latch <auto_ref> is unconnected in block <ref_cntr_inst>.
WARNING:Xst:1291 - FF/Latch <p_auto_ref> is unconnected in block <ref_cntr_inst>.
WARNING:Xst:1291 - FF/Latch <Add_reg_31> is unconnected in block <sys_int_int>.
WARNING:Xst:1291 - FF/Latch <Add_reg_28> is unconnected in block <sys_int_int>.
WARNING:Xst:1291 - FF/Latch <Add_reg_29> is unconnected in block <sys_int_int>.
WARNING:Xst:1291 - FF/Latch <Add_reg_30> is unconnected in block <sys_int_int>.
WARNING:Xst:1291 - FF/Latch <31> is unconnected in block <cntrl>.
WARNING:Xst:1291 - FF/Latch <30> is unconnected in block <cntrl>.
WARNING:Xst:1291 - FF/Latch <7> is unconnected in block <cntrl>.
WARNING:Xst:1291 - FF/Latch <28> is unconnected in block <cntrl>.
WARNING:Xst:1291 - FF/Latch <29> is unconnected in block <cntrl>.
WARNING:Xst:1291 - FF/Latch <Add_reg_0> is unconnected in block <sys_int_int>.
WARNING:Xst:1291 - FF/Latch <Add_reg_1> is unconnected in block <sys_int_int>.
WARNING:Xst:1291 - FF/Latch <Add_reg_22> is unconnected in block <sys_int_int>.
WARNING:Xst:1291 - FF/Latch <Add_reg_23> is unconnected in block <sys_int_int>.
WARNING:Xst:1291 - FF/Latch <Add_reg_24> is unconnected in block <sys_int_int>.
WARNING:Xst:1291 - FF/Latch <Add_reg_25> is unconnected in block <sys_int_int>.
WARNING:Xst:1291 - FF/Latch <Add_reg_26> is unconnected in block <sys_int_int>.
WARNING:Xst:1291 - FF/Latch <Add_reg_27> is unconnected in block <sys_int_int>.

=========================================================================
*                            Final Report                               *
=========================================================================
Final Results
RTL Top Level Output File Name     : sdrm.ngr
Keep Hierarchy                     : NO

Design Statistics
# IOs                              : 92

Cell Usage :
# BELS                             : 6
#      GND                         : 3
#      VCC                         : 3
# FlipFlops/Latches                : 290
#      FD                          : 1
#      FDC                         : 133
#      FDCE                        : 65
#      FDCP                        : 17
#      FDE                         : 2
#      FDP                         : 45
#      FDR                         : 18
#      FDS                         : 9
=========================================================================
CPU : 32.95 / 38.15 s | Elapsed : 33.00 / 38.00 s
 
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Total memory usage is 60292 kilobytes