clock.cmd_log

这是非常好的vhdl例子

xst -intstyle ise -ifn __projnav/clock.xst -ofn clock.syr
ngdbuild -intstyle ise -dd e:\work\coreban\subseg/_ngo -uc top.ucf  -p xc3s200-pq208-4 clock.ngc clock.ngd
map -intstyle ise -p xc3s200-pq208-4 -cm area -pr b -k 4 -c 100 -tx off -o clock_map.ncd clock.ngd clock.pcf
par -w -intstyle ise -ol std -t 1 clock_map.ncd clock.ncd clock.pcf
trce -intstyle ise -e 3 -l 3 -xml clock clock.ncd -o clock.twr clock.pcf
bitgen -intstyle ise -f clock.ut clock.ncd
xst -intstyle ise -ifn __projnav/clock.xst -ofn clock.syr
ngdbuild -intstyle ise -dd e:\work\digital_sward\sub_demo\subseg/_ngo -uc top.ucf  -p xc3s400-pq208-4 clock.ngc clock.ngd
map -intstyle ise -p xc3s400-pq208-4 -cm area -pr b -k 4 -c 100 -tx off -o clock_map.ncd clock.ngd clock.pcf
par -w -intstyle ise -ol std -t 1 clock_map.ncd clock.ncd clock.pcf
trce -intstyle ise -e 3 -l 3 -xml clock clock.ncd -o clock.twr clock.pcf
bitgen -intstyle ise -f clock.ut clock.ncd