clock.pcf

来自「这是非常好的vhdl例子」· PCF 代码 · 共 19 行

SCHEMATIC START ;
// created by map version G.28 on Thu Dec 02 09:21:35 2004 
COMP "en" LOCATE =  SITE "P205" LEVEL 1; 
COMP "clk" LOCATE =  SITE "P80" LEVEL 1; 
COMP "seg<0>" LOCATE =  SITE "P16" LEVEL 1; 
COMP "seg<1>" LOCATE =  SITE "P18" LEVEL 1; 
COMP "seg<2>" LOCATE =  SITE "P13" LEVEL 1; 
COMP "seg<3>" LOCATE =  SITE "P15" LEVEL 1; 
COMP "seg<4>" LOCATE =  SITE "P9" LEVEL 1; 
COMP "a<0>" LOCATE =  SITE "P20" LEVEL 1; 
COMP "seg<5>" LOCATE =  SITE "P12" LEVEL 1; 
COMP "a<1>" LOCATE =  SITE "P19" LEVEL 1; 
COMP "seg<6>" LOCATE =  SITE "P11" LEVEL 1; 
COMP "a<2>" LOCATE =  SITE "P22" LEVEL 1; 
COMP "seg<7>" LOCATE =  SITE "P10" LEVEL 1; 
COMP "a<3>" LOCATE =  SITE "P21" LEVEL 1; 
NET "clk_BUFGP/IBUFG" BEL "clk_BUFGP/BUFG.GCLKMUX" USELOCALCONNECT ;
SCHEMATIC END ;