📄 1(1).txt
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LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY DECODER IS
PORT(
A :IN STD_LOGIC_VECTOR(2 DOWNTO 0);
Y :OUT STD_LOGIC_VECTOR(7 DOWNTO 0)
);
END DECODER;
ARCHITECTURE A OF DECODER IS
SIGNAL SEL:STD_LOGIC_VECTOR(2 DOWNTO 0);
BEGIN
SEL(0)<=A(0);
SEL(1)<=A(1);
SEL(2)<=A(2);
PROCESS(SEL)
BEGIN
CASE A IS
WHEN "000"=> Y<="00000001";
WHEN "001"=> Y<="00000010";
WHEN "010"=> Y<="00000100";
WHEN "011"=> Y<="00001000";
WHEN "100"=> Y<="00010000";
WHEN "101"=> Y<="00100000";
WHEN "110"=> Y<="01000000";
WHEN "111"=> Y<="10000000";
WHEN OTHERS=>NULL;
END CASE;
END PROCESS;
END A;
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