📄 performance.fit.eqn
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
--A1L3Q is BER[0]~reg0 at LC_X36_Y9_N1
--operation mode is normal
A1L3Q_lut_out = count[0];
A1L3Q = DFFEAS(A1L3Q_lut_out, GLOBAL(clk), VCC, , A1L9, , , , );
--A1L5Q is BER[1]~reg0 at LC_X36_Y9_N4
--operation mode is normal
A1L5Q_lut_out = count[1];
A1L5Q = DFFEAS(A1L5Q_lut_out, GLOBAL(clk), VCC, , A1L9, , , , );
--A1L7Q is BER[2]~reg0 at LC_X36_Y9_N8
--operation mode is normal
A1L7Q_lut_out = count[2];
A1L7Q = DFFEAS(A1L7Q_lut_out, GLOBAL(clk), VCC, , A1L9, , , , );
--A1L10Q is BER[3]~reg0 at LC_X36_Y9_N5
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.
A1L10Q_lut_out = GND;
A1L10Q = DFFEAS(A1L10Q_lut_out, GLOBAL(clk), VCC, , A1L9, count[3], , , VCC);
--count[0] is count[0] at LC_X35_Y9_N6
--operation mode is arithmetic
count[0]_lut_out = A1L16 $ count[0];
count[0] = DFFEAS(count[0]_lut_out, GLOBAL(clk), !GLOBAL(rst), , , A1L16, , , A1L36);
--A1L20 is count[0]~50 at LC_X35_Y9_N6
--operation mode is arithmetic
A1L20_cout_0 = A1L16 & count[0];
A1L20 = CARRY(A1L20_cout_0);
--A1L21 is count[0]~50COUT1_66 at LC_X35_Y9_N6
--operation mode is arithmetic
A1L21_cout_1 = A1L16 & count[0];
A1L21 = CARRY(A1L21_cout_1);
--i[3] is i[3] at LC_X36_Y9_N9
--operation mode is normal
i[3]_lut_out = i[0] & (i[3] $ (i[2] & i[1])) # !i[0] & i[3] & (i[1] # !i[2]);
i[3] = DFFEAS(i[3]_lut_out, GLOBAL(clk), !GLOBAL(rst), , , , , , );
--i[2] is i[2] at LC_X36_Y9_N0
--operation mode is normal
i[2]_lut_out = i[0] & (i[2] $ i[1]) # !i[0] & i[2] & (i[1] # !i[3]);
i[2] = DFFEAS(i[2]_lut_out, GLOBAL(clk), !GLOBAL(rst), , , , , , );
--i[1] is i[1] at LC_X36_Y9_N6
--operation mode is normal
i[1]_lut_out = i[1] $ (i[0]);
i[1] = DFFEAS(i[1]_lut_out, GLOBAL(clk), !GLOBAL(rst), , , , , , );
--i[0] is i[0] at LC_X36_Y9_N2
--operation mode is normal
i[0]_lut_out = !i[0];
i[0] = DFFEAS(i[0]_lut_out, GLOBAL(clk), !GLOBAL(rst), , , , , , );
--A1L36 is rtl~26 at LC_X36_Y9_N7
--operation mode is normal
A1L36 = !i[0] & i[3] & i[2] & !i[1];
--A1L9 is BER[3]~12 at LC_X36_Y9_N3
--operation mode is normal
A1L9 = A1L36 & (!rst);
--count[1] is count[1] at LC_X35_Y9_N7
--operation mode is arithmetic
count[1]_lut_out = count[1] $ (A1L20);
count[1] = DFFEAS(count[1]_lut_out, GLOBAL(clk), !GLOBAL(rst), , , ~GND, , , A1L36);
--A1L23 is count[1]~54 at LC_X35_Y9_N7
--operation mode is arithmetic
A1L23_cout_0 = !A1L20 # !count[1];
A1L23 = CARRY(A1L23_cout_0);
--A1L24 is count[1]~54COUT1 at LC_X35_Y9_N7
--operation mode is arithmetic
A1L24_cout_1 = !A1L21 # !count[1];
A1L24 = CARRY(A1L24_cout_1);
--count[2] is count[2] at LC_X35_Y9_N8
--operation mode is arithmetic
count[2]_lut_out = count[2] $ (!A1L23);
count[2] = DFFEAS(count[2]_lut_out, GLOBAL(clk), !GLOBAL(rst), , , ~GND, , , A1L36);
--A1L26 is count[2]~58 at LC_X35_Y9_N8
--operation mode is arithmetic
A1L26_cout_0 = count[2] & (!A1L23);
A1L26 = CARRY(A1L26_cout_0);
--A1L27 is count[2]~58COUT1_67 at LC_X35_Y9_N8
--operation mode is arithmetic
A1L27_cout_1 = count[2] & (!A1L24);
A1L27 = CARRY(A1L27_cout_1);
--count[3] is count[3] at LC_X35_Y9_N9
--operation mode is normal
count[3]_lut_out = A1L26 $ count[3];
count[3] = DFFEAS(count[3]_lut_out, GLOBAL(clk), !GLOBAL(rst), , , ~GND, , , A1L36);
--A1L16 is always0~0 at LC_X35_Y9_N5
--operation mode is normal
A1L16 = result $ InfoSeq;
--~GND is ~GND at LC_X35_Y9_N2
--operation mode is normal
~GND = GND;
--clk is clk at PIN_L2
--operation mode is input
clk = INPUT();
--rst is rst at PIN_L3
--operation mode is input
rst = INPUT();
--InfoSeq is InfoSeq at PIN_U9
--operation mode is input
InfoSeq = INPUT();
--result is result at PIN_Y9
--operation mode is input
result = INPUT();
--BER[0] is BER[0] at PIN_Y8
--operation mode is output
BER[0] = OUTPUT(A1L3Q);
--BER[1] is BER[1] at PIN_P8
--operation mode is output
BER[1] = OUTPUT(A1L5Q);
--BER[2] is BER[2] at PIN_T2
--operation mode is output
BER[2] = OUTPUT(A1L7Q);
--BER[3] is BER[3] at PIN_M6
--operation mode is output
BER[3] = OUTPUT(A1L10Q);
--BER[4] is BER[4] at PIN_P10
--operation mode is output
BER[4] = OUTPUT(~GND);
--BER[5] is BER[5] at PIN_N8
--operation mode is output
BER[5] = OUTPUT(~GND);
--BER[6] is BER[6] at PIN_M8
--operation mode is output
BER[6] = OUTPUT(~GND);
--BER[7] is BER[7] at PIN_P9
--operation mode is output
BER[7] = OUTPUT(~GND);
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