📄 pack.vhd
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library ieee; use ieee.std_logic_1164.all; use work.components_pack.all; package pack is -- Path to data files constant PATH : string := "../matlab/"; -- Input stimuli file constant INPUT_FILE : string := PATH & "input.dat"; -- Output trace file constant OUTPUT_FILE : string := PATH & "output.dat"; -- Half a clock period constant PULSEWIDTH : time := 100 ns; -- Reset on startup constant RESET_TIME : time := 200 ns; -- Input (A/D) wordlength constant AD_WIDTH : integer := 16; -- Coefficient wordlength constant COEFF_WIDTH : integer := 12; -- Output (D/A) wordlength constant DA_WIDTH : integer := 16; -- Filter order constant M : integer := 8; -- Type definition for the impulse response type impulse_response_type is array (0 to M) of integer; -- Example impulse response (8,0.8) constant H : impulse_response_type := (-4, 22, -84, 166, 822, 166, -84, 22, -4); -- Dynamic range of the result according to Ass.4 in Session 1 -- constant RESULT_WIDTH : integer := 34; -- Type definitions for the filter subtype input_type is std_logic_vector(AD_WIDTH-1 downto 0); subtype output_type is std_logic_vector(DA_WIDTH-1 downto 0); subtype coeff_type is std_logic_vector(COEFF_WIDTH-1 downto 0); subtype mult_type is std_logic_vector(AD_WIDTH+COEFF_WIDTH-1 downto 0); subtype add_type is std_logic_vector(AD_WIDTH+COEFF_WIDTH+M-1 downto 0); type product_type is array (0 to M) of mult_type; type adder_type is array (0 to M) of add_type; type reg_d_type is array (0 to M) of input_type; -- direct form type data_type is array (0 to 60) of output_type; -- FIFO -- Type for controller type en_type is record addr : std_logic_vector(5 downto 0); en_FIR : std_logic; en_decimate : std_logic; en_FIFO : std_logic; clk_FIFO : std_logic; en_comparator : std_logic; en_peak : std_logic; en_clipper : std_logic; cs : std_logic; oe : std_logic; en_acc : std_logic; en_ipk : std_logic; en_clr : std_logic; recycle : std_logic; en_read : std_logic; en_write : std_logic; end record; end pack;
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