count9.gyd

xilinx xc9572 cpld 实现的伺服电机控制器

Pin Freeze File:  version G.35

9572100TQ XC9572-10-TQ100
CCLK S:PIN74
CE S:PIN11
CLR S:PIN17
UP S:PIN97
Qout<0> S:PIN39
Qout<1> S:PIN13
Qout<2> S:PIN15
Qout<3> S:PIN28
Qout<4> S:PIN64
Qout<5> S:PIN32
Qout<6> S:PIN94
Qout<7> S:PIN81
Qout<8> S:PIN60
Qout<9> S:PIN6


;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit.

PARTITION FB1_2 Temp<1>
PARTITION FB1_6 Temp<2>
PARTITION FB1_10 Temp<3>
PARTITION FB1_16 Temp<0>

PARTITION FB2_2 Temp<6>
PARTITION FB2_12 Temp<9>

PARTITION FB3_2 Temp<5>
PARTITION FB3_10 Temp<8>

PARTITION FB4_2 Temp<4>
PARTITION FB4_10 Temp<7>