count9.mfd

xilinx xc9572 cpld 实现的伺服电机控制器

MDF Database:  version 1.0
MDF_INFO | count9 | XC9572-10-TQ100
MACROCELL | 0 | 15 | Temp<0>
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 9 | 1 | 11 | 2 | 9 | 3 | 9 | 3 | 1 | 2 | 1 | 1 | 1 | 0 | 1 | 0 | 5 | 0 | 9
INPUTS | 3 | CE  | CCLK  | CLR
INPUTP | 3 | 9 | 67 | 15
EQ | 3 | 
   !Qout<0>.T = CE;
   Qout<0>.CLK = CCLK;
   Qout<0>.AR = CLR;

MACROCELL | 0 | 1 | Temp<1>
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 8 | 1 | 11 | 2 | 9 | 3 | 1 | 2 | 1 | 1 | 1 | 3 | 9 | 0 | 5 | 0 | 9
INPUTS | 5 | UP  | CE  | CCLK  | CLR  | Temp<0>.FBK.LFBK
INPUTMC | 1 | 0 | 15
INPUTP | 4 | 89 | 9 | 67 | 15
EQ | 4 | 
   Qout<1>.T = UP & !CE & Temp<0>.FBK.LFBK
	# !UP & !CE & !Temp<0>.FBK.LFBK;
   Qout<1>.CLK = CCLK;
   Qout<1>.AR = CLR;

MACROCELL | 0 | 5 | Temp<2>
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 7 | 1 | 11 | 3 | 1 | 2 | 1 | 1 | 1 | 3 | 9 | 2 | 9 | 0 | 9
INPUTS | 6 | Temp<1>.FBK.LFBK  | UP  | CE  | CCLK  | CLR  | Temp<0>.FBK.LFBK
INPUTMC | 2 | 0 | 1 | 0 | 15
INPUTP | 4 | 89 | 9 | 67 | 15
EQ | 4 | 
   Qout<2>.T = UP & !CE & Temp<0>.FBK.LFBK & Temp<1>.FBK.LFBK
	# !UP & !CE & !Temp<0>.FBK.LFBK & !Temp<1>.FBK.LFBK;
   Qout<2>.CLK = CCLK;
   Qout<2>.AR = CLR;

MACROCELL | 0 | 9 | Temp<3>
ATTRIBUTES | 4588336 | 0
OUTPUTMC | 6 | 3 | 1 | 2 | 1 | 1 | 1 | 3 | 9 | 2 | 9 | 1 | 11
INPUTS | 7 | Temp<1>.FBK.LFBK  | Temp<2>.FBK.LFBK  | UP  | CE  | CCLK  | CLR  | Temp<0>.FBK.LFBK
INPUTMC | 3 | 0 | 1 | 0 | 5 | 0 | 15
INPUTP | 4 | 89 | 9 | 67 | 15
EQ | 6 | 
   Qout<3>.T = UP & !CE & Temp<0>.FBK.LFBK & Temp<1>.FBK.LFBK & 
	Temp<2>.FBK.LFBK
	# !UP & !CE & !Temp<0>.FBK.LFBK & !Temp<1>.FBK.LFBK & 
	!Temp<2>.FBK.LFBK;
   Qout<3>.CLK = CCLK;
   Qout<3>.AR = CLR;

MACROCELL | 3 | 1 | Temp<4>
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 5 | 2 | 1 | 1 | 1 | 1 | 11 | 2 | 9 | 3 | 9
INPUTS | 8 | Qout<0>  | Qout<1>  | Qout<2>  | Qout<3>  | UP  | CE  | CCLK  | CLR
INPUTMC | 4 | 0 | 15 | 0 | 1 | 0 | 5 | 0 | 9
INPUTP | 4 | 89 | 9 | 67 | 15
EQ | 6 | 
   Qout<4>.T = Qout<0> & Qout<1> & Qout<2> & Qout<3> & UP & 
	!CE
	# !Qout<0> & !Qout<1> & !Qout<2> & !Qout<3> & !UP & 
	!CE;
   Qout<4>.CLK = CCLK;
   Qout<4>.AR = CLR;

MACROCELL | 2 | 1 | Temp<5>
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 4 | 1 | 1 | 3 | 9 | 1 | 11 | 2 | 9
INPUTS | 9 | Qout<0>  | Qout<1>  | Qout<2>  | Qout<3>  | Qout<4>  | UP  | CE  | CCLK  | CLR
INPUTMC | 5 | 0 | 15 | 0 | 1 | 0 | 5 | 0 | 9 | 3 | 1
INPUTP | 4 | 89 | 9 | 67 | 15
EQ | 6 | 
   Qout<5>.T = Qout<0> & Qout<1> & Qout<2> & Qout<3> & 
	Qout<4> & UP & !CE
	# !Qout<0> & !Qout<1> & !Qout<2> & !Qout<3> & 
	!Qout<4> & !UP & !CE;
   Qout<5>.CLK = CCLK;
   Qout<5>.AR = CLR;

MACROCELL | 1 | 1 | Temp<6>
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 3 | 3 | 9 | 2 | 9 | 1 | 11
INPUTS | 10 | Qout<0>  | Qout<1>  | Qout<2>  | Qout<3>  | Qout<4>  | Qout<5>  | UP  | CE  | CCLK  | CLR
INPUTMC | 6 | 0 | 15 | 0 | 1 | 0 | 5 | 0 | 9 | 3 | 1 | 2 | 1
INPUTP | 4 | 89 | 9 | 67 | 15
EQ | 6 | 
   Qout<6>.T = Qout<0> & Qout<1> & Qout<2> & Qout<3> & 
	Qout<4> & Qout<5> & UP & !CE
	# !Qout<0> & !Qout<1> & !Qout<2> & !Qout<3> & 
	!Qout<4> & !Qout<5> & !UP & !CE;
   Qout<6>.CLK = CCLK;
   Qout<6>.AR = CLR;

MACROCELL | 3 | 9 | Temp<7>
ATTRIBUTES | 4588336 | 0
OUTPUTMC | 2 | 2 | 9 | 1 | 11
INPUTS | 11 | Qout<0>  | Qout<1>  | Qout<2>  | Qout<3>  | Qout<5>  | Qout<6>  | UP  | CE  | CCLK  | CLR  | Temp<4>.FBK.LFBK
INPUTMC | 7 | 0 | 15 | 0 | 1 | 0 | 5 | 0 | 9 | 2 | 1 | 1 | 1 | 3 | 1
INPUTP | 4 | 89 | 9 | 67 | 15
EQ | 6 | 
   Qout<7>.T = Qout<0> & Qout<1> & Qout<2> & Qout<3> & 
	Qout<5> & Qout<6> & UP & !CE & Temp<4>.FBK.LFBK
	# !Qout<0> & !Qout<1> & !Qout<2> & !Qout<3> & 
	!Qout<5> & !Qout<6> & !UP & !CE & !Temp<4>.FBK.LFBK;
   Qout<7>.CLK = CCLK;
   Qout<7>.AR = CLR;

MACROCELL | 2 | 9 | Temp<8>
ATTRIBUTES | 4588336 | 0
OUTPUTMC | 1 | 1 | 11
INPUTS | 12 | Qout<0>  | Qout<1>  | Qout<2>  | Qout<3>  | Qout<4>  | Qout<6>  | Qout<7>  | UP  | CE  | CCLK  | CLR  | Temp<5>.FBK.LFBK
INPUTMC | 8 | 0 | 15 | 0 | 1 | 0 | 5 | 0 | 9 | 3 | 1 | 1 | 1 | 3 | 9 | 2 | 1
INPUTP | 4 | 89 | 9 | 67 | 15
EQ | 6 | 
   Qout<8>.T = Qout<0> & Qout<1> & Qout<2> & Qout<3> & 
	Qout<4> & Qout<6> & Qout<7> & UP & !CE & Temp<5>.FBK.LFBK
	# !Qout<0> & !Qout<1> & !Qout<2> & !Qout<3> & 
	!Qout<4> & !Qout<6> & !Qout<7> & !UP & !CE & !Temp<5>.FBK.LFBK;
   Qout<8>.CLK = CCLK;
   Qout<8>.AR = CLR;

MACROCELL | 1 | 11 | Temp<9>
ATTRIBUTES | 4457264 | 0
INPUTS | 13 | Qout<0>  | Qout<1>  | Qout<2>  | Qout<3>  | Qout<4>  | Qout<5>  | Qout<7>  | Qout<8>  | UP  | CE  | CCLK  | CLR  | Temp<6>.FBK.LFBK
INPUTMC | 9 | 0 | 15 | 0 | 1 | 0 | 5 | 0 | 9 | 3 | 1 | 2 | 1 | 3 | 9 | 2 | 9 | 1 | 1
INPUTP | 4 | 89 | 9 | 67 | 15
EQ | 8 | 
   Qout<9>.T = Qout<0> & Qout<1> & Qout<2> & Qout<3> & 
	Qout<4> & Qout<5> & Qout<7> & Qout<8> & UP & !CE & 
	Temp<6>.FBK.LFBK
	# !Qout<0> & !Qout<1> & !Qout<2> & !Qout<3> & 
	!Qout<4> & !Qout<5> & !Qout<7> & !Qout<8> & !UP & !CE & 
	!Temp<6>.FBK.LFBK;
   Qout<9>.CLK = CCLK;
   Qout<9>.AR = CLR;

PIN | CCLK | 64 | 0 | N/A | 67 | 10 | 0 | 15 | 0 | 1 | 0 | 5 | 0 | 9 | 3 | 1 | 2 | 1 | 1 | 1 | 3 | 9 | 2 | 9 | 1 | 11
PIN | CLR | 64 | 0 | N/A | 15 | 10 | 0 | 15 | 0 | 1 | 0 | 5 | 0 | 9 | 3 | 1 | 2 | 1 | 1 | 1 | 3 | 9 | 2 | 9 | 1 | 11
PIN | CE | 64 | 0 | N/A | 9 | 10 | 0 | 15 | 0 | 1 | 0 | 5 | 0 | 9 | 3 | 1 | 2 | 1 | 1 | 1 | 3 | 9 | 2 | 9 | 1 | 11
PIN | UP | 64 | 0 | N/A | 89 | 9 | 0 | 1 | 0 | 5 | 0 | 9 | 3 | 1 | 2 | 1 | 1 | 1 | 3 | 9 | 2 | 9 | 1 | 11
PIN | Qout<0> | 128 | 0 | N/A | 35
PIN | Qout<1> | 128 | 0 | N/A | 11
PIN | Qout<2> | 128 | 0 | N/A | 13
PIN | Qout<3> | 128 | 0 | N/A | 25
PIN | Qout<4> | 128 | 0 | N/A | 58
PIN | Qout<5> | 128 | 0 | N/A | 29
PIN | Qout<6> | 128 | 0 | N/A | 86
PIN | Qout<7> | 128 | 0 | N/A | 73
PIN | Qout<8> | 128 | 0 | N/A | 54
PIN | Qout<9> | 128 | 0 | N/A | 5