sel4_1.vm6

来自「xilinx xc9572 cpld 实现的伺服电机控制器」· VM6 代码 · 共 822 行 · 第 1/4 页

VM6
822 行
字号
1234
NODE | MR_0_2_IBUF | 1348 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_0_2_IBUF | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | MR_1_2_IBUF | sel4_1_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | MR_1<2> | 1411 | PI | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | MR_1_2_IBUF | 1368 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_1_2_IBUF | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | MR_3_2_IBUF | sel4_1_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | MR_3<2> | 1412 | PI | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | MR_3_2_IBUF | 1369 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_3_2_IBUF | 0 | 5 | II_IMUX

MACROCELL_INSTANCE | PinTrst+OptxMapped | DO_2_OBUFE | sel4_1_COPY_0_COPY_0 | 2155888640 | 7 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | A1_IBUF | 1342 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | A1_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_2_2_IBUF | 1349 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_2_2_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | A0_IBUF | 1374 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | A0_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_0_2_IBUF | 1348 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_0_2_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_1_2_IBUF | 1368 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_1_2_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_3_2_IBUF | 1369 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_3_2_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | CS_IBUF | 1324 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | CS_IBUF | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | DO_2_OBUFE | 1329 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | DO_2_OBUFE.Q | DO_2_OBUFE | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 2 | 0 | MC_OE
NODE | DO_2_OBUFE$OE | 1330 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | DO_2_OBUFE.BUFOE.OUT | DO_2_OBUFE | 2 | 0 | MC_OE

SIGNAL_INSTANCE | DO_2_OBUFE.SI | DO_2_OBUFE | 0 | 7 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | A1_IBUF | 1342 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | A1_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_2_2_IBUF | 1349 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_2_2_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | A0_IBUF | 1374 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | A0_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_0_2_IBUF | 1348 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_0_2_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_1_2_IBUF | 1368 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_1_2_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_3_2_IBUF | 1369 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_3_2_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | CS_IBUF | 1324 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | CS_IBUF | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | DO_2_OBUFE.D1 | 1431 | ? | 0 | 4096 | DO_2_OBUFE | NULL | NULL | DO_2_OBUFE.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | DO_2_OBUFE.D2 | 1432 | ? | 0 | 4096 | DO_2_OBUFE | NULL | NULL | DO_2_OBUFE.SI | 2 | 9 | MC_SI_D2
SPPTERM | 3 | IV_TRUE | A1_IBUF | IV_TRUE | MR_0_2_IBUF | IV_TRUE | A0_IBUF
SPPTERM | 3 | IV_TRUE | A1_IBUF | IV_TRUE | MR_1_2_IBUF | IV_FALSE | A0_IBUF
SPPTERM | 3 | IV_FALSE | A1_IBUF | IV_TRUE | MR_2_2_IBUF | IV_TRUE | A0_IBUF
SPPTERM | 3 | IV_FALSE | A1_IBUF | IV_TRUE | MR_3_2_IBUF | IV_FALSE | A0_IBUF
OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST
SIGNAL | NODE | DO_2_OBUFE.TRST | 1434 | ? | 0 | 4096 | DO_2_OBUFE | NULL | NULL | DO_2_OBUFE.SI | 4 | 9 | MC_SI_TRST
SPPTERM | 1 | IV_FALSE | CS_IBUF

SRFF_INSTANCE | DO_2_OBUFE.REG | DO_2_OBUFE | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | DO_2_OBUFE.D | 1430 | ? | 0 | 0 | DO_2_OBUFE | NULL | NULL | DO_2_OBUFE.XOR | 0 | 7 | ALU_F
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | DO_2_OBUFE.Q | 1435 | ? | 0 | 0 | DO_2_OBUFE | NULL | NULL | DO_2_OBUFE.REG | 0 | 8 | SRFF_Q

BUF_INSTANCE | DO_2_OBUFE.BUFOE | DO_2_OBUFE | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN
SIGNAL | NODE | DO_2_OBUFE.TRST | 1434 | ? | 0 | 4096 | DO_2_OBUFE | NULL | NULL | DO_2_OBUFE.SI | 4 | 9 | MC_SI_TRST
SPPTERM | 1 | IV_FALSE | CS_IBUF
OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT
NODE | DO_2_OBUFE.BUFOE.OUT | 1433 | ? | 0 | 0 | DO_2_OBUFE | NULL | NULL | DO_2_OBUFE.BUFOE | 0 | 10 | BUF_OUT

INPUT_INSTANCE | 0 | 0 | NULL | MR_1_3_IBUF | sel4_1_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | MR_1<3> | 1409 | PI | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | MR_1_3_IBUF | 1366 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_1_3_IBUF | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | MR_3_3_IBUF | sel4_1_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | MR_3<3> | 1410 | PI | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | MR_3_3_IBUF | 1367 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_3_3_IBUF | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | MR_0_3_IBUF | sel4_1_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | MR_0<3> | 1393 | PI | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | MR_0_3_IBUF | 1350 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_0_3_IBUF | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | MR_2_3_IBUF | sel4_1_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | MR_2<3> | 1394 | PI | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | MR_2_3_IBUF | 1351 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_2_3_IBUF | 0 | 5 | II_IMUX

MACROCELL_INSTANCE | PinTrst+OptxMapped | DO_3_OBUFE | sel4_1_COPY_0_COPY_0 | 2155888640 | 7 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | A1_IBUF | 1342 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | A1_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_1_3_IBUF | 1366 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_1_3_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | A0_IBUF | 1374 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | A0_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_3_3_IBUF | 1367 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_3_3_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_0_3_IBUF | 1350 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_0_3_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_2_3_IBUF | 1351 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_2_3_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | CS_IBUF | 1324 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | CS_IBUF | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | DO_3_OBUFE | 1331 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | DO_3_OBUFE.Q | DO_3_OBUFE | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 2 | 0 | MC_OE
NODE | DO_3_OBUFE$OE | 1332 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | DO_3_OBUFE.BUFOE.OUT | DO_3_OBUFE | 2 | 0 | MC_OE

SIGNAL_INSTANCE | DO_3_OBUFE.SI | DO_3_OBUFE | 0 | 7 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | A1_IBUF | 1342 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | A1_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_1_3_IBUF | 1366 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_1_3_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | A0_IBUF | 1374 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | A0_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_3_3_IBUF | 1367 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_3_3_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_0_3_IBUF | 1350 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_0_3_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_2_3_IBUF | 1351 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_2_3_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | CS_IBUF | 1324 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | CS_IBUF | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | DO_3_OBUFE.D1 | 1437 | ? | 0 | 4096 | DO_3_OBUFE | NULL | NULL | DO_3_OBUFE.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | DO_3_OBUFE.D2 | 1438 | ? | 0 | 4096 | DO_3_OBUFE | NULL | NULL | DO_3_OBUFE.SI | 2 | 9 | MC_SI_D2
SPPTERM | 3 | IV_TRUE | A1_IBUF | IV_TRUE | MR_0_3_IBUF | IV_TRUE | A0_IBUF
SPPTERM | 3 | IV_TRUE | A1_IBUF | IV_TRUE | MR_1_3_IBUF | IV_FALSE | A0_IBUF
SPPTERM | 3 | IV_FALSE | A1_IBUF | IV_TRUE | MR_2_3_IBUF | IV_TRUE | A0_IBUF
SPPTERM | 3 | IV_FALSE | A1_IBUF | IV_TRUE | MR_3_3_IBUF | IV_FALSE | A0_IBUF
OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST
SIGNAL | NODE | DO_3_OBUFE.TRST | 1440 | ? | 0 | 4096 | DO_3_OBUFE | NULL | NULL | DO_3_OBUFE.SI | 4 | 9 | MC_SI_TRST
SPPTERM | 1 | IV_FALSE | CS_IBUF

SRFF_INSTANCE | DO_3_OBUFE.REG | DO_3_OBUFE | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | DO_3_OBUFE.D | 1436 | ? | 0 | 0 | DO_3_OBUFE | NULL | NULL | DO_3_OBUFE.XOR | 0 | 7 | ALU_F
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | DO_3_OBUFE.Q | 1441 | ? | 0 | 0 | DO_3_OBUFE | NULL | NULL | DO_3_OBUFE.REG | 0 | 8 | SRFF_Q

BUF_INSTANCE | DO_3_OBUFE.BUFOE | DO_3_OBUFE | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN
SIGNAL | NODE | DO_3_OBUFE.TRST | 1440 | ? | 0 | 4096 | DO_3_OBUFE | NULL | NULL | DO_3_OBUFE.SI | 4 | 9 | MC_SI_TRST
SPPTERM | 1 | IV_FALSE | CS_IBUF
OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT
NODE | DO_3_OBUFE.BUFOE.OUT | 1439 | ? | 0 | 0 | DO_3_OBUFE | NULL | NULL | DO_3_OBUFE.BUFOE | 0 | 10 | BUF_OUT

INPUT_INSTANCE | 0 | 0 | NULL | MR_1_4_IBUF | sel4_1_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | MR_1<4> | 1407 | PI | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | MR_1_4_IBUF | 1364 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_1_4_IBUF | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | MR_3_4_IBUF | sel4_1_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | MR_3<4> | 1408 | PI | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | MR_3_4_IBUF | 1365 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_3_4_IBUF | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | MR_0_4_IBUF | sel4_1_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | MR_0<4> | 1395 | PI | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | MR_0_4_IBUF | 1352 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_0_4_IBUF | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | MR_2_4_IBUF | sel4_1_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | MR_2<4> | 1396 | PI | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | MR_2_4_IBUF | 1353 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_2_4_IBUF | 0 | 5 | II_IMUX

MACROCELL_INSTANCE | PinTrst+OptxMapped | DO_4_OBUFE | sel4_1_COPY_0_COPY_0 | 2155888640 | 7 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | A1_IBUF | 1342 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | A1_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_1_4_IBUF | 1364 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_1_4_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | A0_IBUF | 1374 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | A0_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_3_4_IBUF | 1365 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_3_4_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_0_4_IBUF | 1352 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_0_4_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | MR_2_4_IBUF | 1353 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | MR_2_4_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | CS_IBUF | 1324 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | NULL | CS_IBUF | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | DO_4_OBUFE | 1333 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | DO_4_OBUFE.Q | DO_4_OBUFE | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 2 | 0 | MC_OE
NODE | DO_4_OBUFE$OE | 1334 | ? | 0 | 0 | sel4_1_COPY_0_COPY_0 | NULL | DO_4_OBUFE.BUFOE.OUT | DO_4_OBUFE | 2 | 0 | MC_OE

SIGNAL_INSTANCE | DO_4_OBUFE.SI | DO_4_OBUFE | 0 | 7 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
1234

sel4_1.vm6 - 源码说明

本页面展示了「xilinx xc9572 cpld 实现的伺服电机控制器」中的 sel4_1.vm6 源码文件，采用 VM6 编程语言编写，共 822 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

虫虫开发者社区收录了大量与Xilinx相关的技术资源，包括源代码、技术文档、电路图等，是电子工程师和嵌入式开发者的专业学习平台。

⌨️ 快捷键说明

复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?