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来自「xilinx xc9572 cpld 实现的伺服电机控制器」· MFD 代码 · 共 788 行 · 第 1/2 页

MFD
788
字号
MDF Database:  version 1.0
MDF_INFO | top | XC9572-10-TQ100
MACROCELL | 1 | 7 | CS1_OBUF
ATTRIBUTES | 264960 | 0
INPUTS | 4 | CS  | A2  | A1  | A0
INPUTP | 4 | 25 | 26 | 24 | 10
EQ | 1 | 
   !CS1 = !CS & !A2 & !A1 & !A0;

MACROCELL | 1 | 3 | M1CLR_OBUF
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 1 | 1 | 3
INPUTS | 13 | D<1>.PIN  | D<0>.PIN  | CS  | A2  | A1  | A0  | D<4>.PIN  | D<3>.PIN  | D<2>.PIN  | D<7>.PIN  | WR  | RESET  | M1CLR_OBUF.FBK.LFBK
INPUTMC | 1 | 1 | 3
INPUTP | 12 | 11 | 14 | 25 | 26 | 24 | 10 | 12 | 17 | 16 | 15 | 7 | 91
EQ | 8 | 
   M1CLR.T = D<1>.PIN & !D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	!D<4>.PIN & D<3>.PIN & !D<2>.PIN & D<7>.PIN & 
	!M1CLR_OBUF.FBK.LFBK
	# D<1>.PIN & !D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	!D<4>.PIN & D<3>.PIN & !D<2>.PIN & !D<7>.PIN & 
	M1CLR_OBUF.FBK.LFBK;
   M1CLR.CLK = WR;
   M1CLR.AR = !RESET;

MACROCELL | 1 | 0 | M1PS_OBUF
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 1 | 1 | 0
INPUTS | 13 | D<1>.PIN  | D<0>.PIN  | CS  | A2  | A1  | A0  | D<4>.PIN  | D<3>.PIN  | D<2>.PIN  | D<7>.PIN  | WR  | RESET  | M1PS_OBUF.FBK.LFBK
INPUTMC | 1 | 1 | 0
INPUTP | 12 | 11 | 14 | 25 | 26 | 24 | 10 | 12 | 17 | 16 | 15 | 7 | 91
EQ | 8 | 
   M1PS.T = !D<1>.PIN & !D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	!D<4>.PIN & D<3>.PIN & !D<2>.PIN & D<7>.PIN & 
	!M1PS_OBUF.FBK.LFBK
	# !D<1>.PIN & !D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	!D<4>.PIN & D<3>.PIN & !D<2>.PIN & !D<7>.PIN & 
	M1PS_OBUF.FBK.LFBK;
   M1PS.CLK = WR;
   M1PS.AR = !RESET;

MACROCELL | 1 | 2 | M1SG_OBUF
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 1 | 1 | 2
INPUTS | 13 | D<1>.PIN  | D<0>.PIN  | CS  | A2  | A1  | A0  | D<4>.PIN  | D<3>.PIN  | D<2>.PIN  | D<7>.PIN  | WR  | RESET  | M1SG_OBUF.FBK.LFBK
INPUTMC | 1 | 1 | 2
INPUTP | 12 | 11 | 14 | 25 | 26 | 24 | 10 | 12 | 17 | 16 | 15 | 7 | 91
EQ | 8 | 
   M1SG.T = !D<1>.PIN & D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	!D<4>.PIN & D<3>.PIN & !D<2>.PIN & D<7>.PIN & 
	!M1SG_OBUF.FBK.LFBK
	# !D<1>.PIN & D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	!D<4>.PIN & D<3>.PIN & !D<2>.PIN & !D<7>.PIN & 
	M1SG_OBUF.FBK.LFBK;
   M1SG.CLK = WR;
   M1SG.AR = !RESET;

MACROCELL | 0 | 15 | M2CLR_OBUF
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 1 | 0 | 15
INPUTS | 13 | D<1>.PIN  | D<0>.PIN  | CS  | A2  | A1  | A0  | D<4>.PIN  | D<3>.PIN  | D<2>.PIN  | D<7>.PIN  | WR  | RESET  | M2CLR_OBUF.FBK.LFBK
INPUTMC | 1 | 0 | 15
INPUTP | 12 | 11 | 14 | 25 | 26 | 24 | 10 | 12 | 17 | 16 | 15 | 7 | 91
EQ | 8 | 
   M2CLR.T = D<1>.PIN & !D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	D<4>.PIN & !D<3>.PIN & !D<2>.PIN & D<7>.PIN & 
	!M2CLR_OBUF.FBK.LFBK
	# D<1>.PIN & !D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	D<4>.PIN & !D<3>.PIN & !D<2>.PIN & !D<7>.PIN & 
	M2CLR_OBUF.FBK.LFBK;
   M2CLR.CLK = WR;
   M2CLR.AR = !RESET;

MACROCELL | 2 | 16 | M2PS_OBUF
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 1 | 2 | 16
INPUTS | 13 | D<1>.PIN  | D<0>.PIN  | CS  | A2  | A1  | A0  | D<4>.PIN  | D<3>.PIN  | D<2>.PIN  | D<7>.PIN  | WR  | RESET  | M2PS_OBUF.FBK.LFBK
INPUTMC | 1 | 2 | 16
INPUTP | 12 | 11 | 14 | 25 | 26 | 24 | 10 | 12 | 17 | 16 | 15 | 7 | 91
EQ | 8 | 
   M2PS.T = !D<1>.PIN & !D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	D<4>.PIN & !D<3>.PIN & !D<2>.PIN & D<7>.PIN & 
	!M2PS_OBUF.FBK.LFBK
	# !D<1>.PIN & !D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	D<4>.PIN & !D<3>.PIN & !D<2>.PIN & !D<7>.PIN & 
	M2PS_OBUF.FBK.LFBK;
   M2PS.CLK = WR;
   M2PS.AR = !RESET;

MACROCELL | 0 | 17 | M2SG_OBUF
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 1 | 0 | 17
INPUTS | 13 | D<1>.PIN  | D<0>.PIN  | CS  | A2  | A1  | A0  | D<4>.PIN  | D<3>.PIN  | D<2>.PIN  | D<7>.PIN  | WR  | RESET  | M2SG_OBUF.FBK.LFBK
INPUTMC | 1 | 0 | 17
INPUTP | 12 | 11 | 14 | 25 | 26 | 24 | 10 | 12 | 17 | 16 | 15 | 7 | 91
EQ | 8 | 
   M2SG.T = !D<1>.PIN & D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	D<4>.PIN & !D<3>.PIN & !D<2>.PIN & D<7>.PIN & 
	!M2SG_OBUF.FBK.LFBK
	# !D<1>.PIN & D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	D<4>.PIN & !D<3>.PIN & !D<2>.PIN & !D<7>.PIN & 
	M2SG_OBUF.FBK.LFBK;
   M2SG.CLK = WR;
   M2SG.AR = !RESET;

MACROCELL | 1 | 5 | PC1ON_OBUF
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 1 | 1 | 5
INPUTS | 13 | D<1>.PIN  | D<0>.PIN  | CS  | A2  | A1  | A0  | D<4>.PIN  | D<3>.PIN  | D<2>.PIN  | D<7>.PIN  | WR  | RESET  | PC1ON_OBUF.FBK.LFBK
INPUTMC | 1 | 1 | 5
INPUTP | 12 | 11 | 14 | 25 | 26 | 24 | 10 | 12 | 17 | 16 | 15 | 7 | 91
EQ | 8 | 
   PC1ON.T = !D<1>.PIN & !D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	!D<4>.PIN & D<3>.PIN & D<2>.PIN & D<7>.PIN & 
	!PC1ON_OBUF.FBK.LFBK
	# !D<1>.PIN & !D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	!D<4>.PIN & D<3>.PIN & D<2>.PIN & !D<7>.PIN & 
	PC1ON_OBUF.FBK.LFBK;
   PC1ON.CLK = WR;
   PC1ON.AR = !RESET;

MACROCELL | 3 | 17 | PC2ON_OBUF
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 1 | 3 | 17
INPUTS | 13 | D<1>.PIN  | D<0>.PIN  | CS  | A2  | A1  | A0  | D<4>.PIN  | D<3>.PIN  | D<2>.PIN  | D<7>.PIN  | WR  | RESET  | PC2ON_OBUF.FBK.LFBK
INPUTMC | 1 | 3 | 17
INPUTP | 12 | 11 | 14 | 25 | 26 | 24 | 10 | 12 | 17 | 16 | 15 | 7 | 91
EQ | 8 | 
   PC2ON.T = !D<1>.PIN & !D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	D<4>.PIN & !D<3>.PIN & D<2>.PIN & D<7>.PIN & 
	!PC2ON_OBUF.FBK.LFBK
	# !D<1>.PIN & !D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	D<4>.PIN & !D<3>.PIN & D<2>.PIN & !D<7>.PIN & 
	PC2ON_OBUF.FBK.LFBK;
   PC2ON.CLK = WR;
   PC2ON.AR = !RESET;

MACROCELL | 1 | 17 | REL0_OBUF
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 1 | 1 | 17
INPUTS | 13 | D<1>.PIN  | D<0>.PIN  | CS  | A2  | A1  | A0  | D<4>.PIN  | D<3>.PIN  | D<2>.PIN  | D<7>.PIN  | WR  | RESET  | REL0_OBUF.FBK.LFBK
INPUTMC | 1 | 1 | 17
INPUTP | 12 | 11 | 14 | 25 | 26 | 24 | 10 | 12 | 17 | 16 | 15 | 7 | 91
EQ | 8 | 
   REL0.T = D<1>.PIN & D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	!D<4>.PIN & !D<3>.PIN & !D<2>.PIN & D<7>.PIN & 
	!REL0_OBUF.FBK.LFBK
	# D<1>.PIN & D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	!D<4>.PIN & !D<3>.PIN & !D<2>.PIN & !D<7>.PIN & 
	REL0_OBUF.FBK.LFBK;
   REL0.CLK = WR;
   REL0.AR = !RESET;

MACROCELL | 3 | 16 | SEN0_OBUF
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 1 | 3 | 16
INPUTS | 13 | D<1>.PIN  | D<0>.PIN  | CS  | A2  | A1  | A0  | D<4>.PIN  | D<3>.PIN  | D<2>.PIN  | D<7>.PIN  | WR  | RESET  | SEN0_OBUF.FBK.LFBK
INPUTMC | 1 | 3 | 16
INPUTP | 12 | 11 | 14 | 25 | 26 | 24 | 10 | 12 | 17 | 16 | 15 | 7 | 91
EQ | 8 | 
   SEN0.T = !D<1>.PIN & !D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	!D<4>.PIN & !D<3>.PIN & !D<2>.PIN & D<7>.PIN & 
	!SEN0_OBUF.FBK.LFBK
	# !D<1>.PIN & !D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	!D<4>.PIN & !D<3>.PIN & !D<2>.PIN & !D<7>.PIN & 
	SEN0_OBUF.FBK.LFBK;
   SEN0.CLK = WR;
   SEN0.AR = !RESET;

MACROCELL | 1 | 4 | SEN1_OBUF
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 1 | 1 | 4
INPUTS | 13 | D<1>.PIN  | D<0>.PIN  | CS  | A2  | A1  | A0  | D<4>.PIN  | D<3>.PIN  | D<2>.PIN  | D<7>.PIN  | WR  | RESET  | SEN1_OBUF.FBK.LFBK
INPUTMC | 1 | 1 | 4
INPUTP | 12 | 11 | 14 | 25 | 26 | 24 | 10 | 12 | 17 | 16 | 15 | 7 | 91
EQ | 8 | 
   SEN1.T = D<1>.PIN & D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	!D<4>.PIN & D<3>.PIN & !D<2>.PIN & D<7>.PIN & 
	!SEN1_OBUF.FBK.LFBK
	# D<1>.PIN & D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	!D<4>.PIN & D<3>.PIN & !D<2>.PIN & !D<7>.PIN & 
	SEN1_OBUF.FBK.LFBK;
   SEN1.CLK = WR;
   SEN1.AR = !RESET;

MACROCELL | 0 | 12 | SEN2_OBUF
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 1 | 0 | 12
INPUTS | 13 | D<1>.PIN  | D<0>.PIN  | CS  | A2  | A1  | A0  | D<4>.PIN  | D<3>.PIN  | D<2>.PIN  | D<7>.PIN  | WR  | RESET  | SEN2_OBUF.FBK.LFBK
INPUTMC | 1 | 0 | 12
INPUTP | 12 | 11 | 14 | 25 | 26 | 24 | 10 | 12 | 17 | 16 | 15 | 7 | 91
EQ | 8 | 
   SEN2.T = D<1>.PIN & D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	D<4>.PIN & !D<3>.PIN & !D<2>.PIN & D<7>.PIN & 
	!SEN2_OBUF.FBK.LFBK
	# D<1>.PIN & D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	D<4>.PIN & !D<3>.PIN & !D<2>.PIN & !D<7>.PIN & 
	SEN2_OBUF.FBK.LFBK;
   SEN2.CLK = WR;
   SEN2.AR = !RESET;

MACROCELL | 2 | 9 | SPD2A_OBUF
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 1 | 2 | 9
INPUTS | 13 | D<1>.PIN  | D<0>.PIN  | CS  | A2  | A1  | A0  | D<4>.PIN  | D<3>.PIN  | D<2>.PIN  | D<7>.PIN  | WR  | RESET  | SPD2A_OBUF.FBK.LFBK
INPUTMC | 1 | 2 | 9
INPUTP | 12 | 11 | 14 | 25 | 26 | 24 | 10 | 12 | 17 | 16 | 15 | 7 | 91
EQ | 8 | 
   SPD2A.T = !D<1>.PIN & D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	D<4>.PIN & !D<3>.PIN & D<2>.PIN & D<7>.PIN & 
	!SPD2A_OBUF.FBK.LFBK
	# !D<1>.PIN & D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	D<4>.PIN & !D<3>.PIN & D<2>.PIN & !D<7>.PIN & 
	SPD2A_OBUF.FBK.LFBK;
   SPD2A.CLK = WR;
   SPD2A.AR = !RESET;

MACROCELL | 1 | 1 | SPDA1_OBUF
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 1 | 1 | 1
INPUTS | 13 | D<1>.PIN  | D<0>.PIN  | CS  | A2  | A1  | A0  | D<4>.PIN  | D<3>.PIN  | D<2>.PIN  | D<7>.PIN  | WR  | RESET  | SPDA1_OBUF.FBK.LFBK
INPUTMC | 1 | 1 | 1
INPUTP | 12 | 11 | 14 | 25 | 26 | 24 | 10 | 12 | 17 | 16 | 15 | 7 | 91
EQ | 8 | 
   SPDA1.T = !D<1>.PIN & D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	!D<4>.PIN & D<3>.PIN & D<2>.PIN & D<7>.PIN & 
	!SPDA1_OBUF.FBK.LFBK
	# !D<1>.PIN & D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	!D<4>.PIN & D<3>.PIN & D<2>.PIN & !D<7>.PIN & 
	SPDA1_OBUF.FBK.LFBK;
   SPDA1.CLK = WR;
   SPDA1.AR = !RESET;

MACROCELL | 2 | 17 | SPDB1_OBUF
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 1 | 2 | 17
INPUTS | 13 | D<1>.PIN  | D<0>.PIN  | CS  | A2  | A1  | A0  | D<4>.PIN  | D<3>.PIN  | D<2>.PIN  | D<7>.PIN  | WR  | RESET  | SPDB1_OBUF.FBK.LFBK
INPUTMC | 1 | 2 | 17
INPUTP | 12 | 11 | 14 | 25 | 26 | 24 | 10 | 12 | 17 | 16 | 15 | 7 | 91
EQ | 8 | 
   SPDB1.T = D<1>.PIN & !D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	!D<4>.PIN & D<3>.PIN & D<2>.PIN & D<7>.PIN & 
	!SPDB1_OBUF.FBK.LFBK
	# D<1>.PIN & !D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	!D<4>.PIN & D<3>.PIN & D<2>.PIN & !D<7>.PIN & 
	SPDB1_OBUF.FBK.LFBK;
   SPDB1.CLK = WR;
   SPDB1.AR = !RESET;

MACROCELL | 2 | 8 | SPDB2_OBUF
ATTRIBUTES | 4653872 | 0
OUTPUTMC | 1 | 2 | 8
INPUTS | 13 | D<1>.PIN  | D<0>.PIN  | CS  | A2  | A1  | A0  | D<4>.PIN  | D<3>.PIN  | D<2>.PIN  | D<7>.PIN  | WR  | RESET  | SPDB2_OBUF.FBK.LFBK
INPUTMC | 1 | 2 | 8
INPUTP | 12 | 11 | 14 | 25 | 26 | 24 | 10 | 12 | 17 | 16 | 15 | 7 | 91
EQ | 8 | 
   SPDB2.T = D<1>.PIN & !D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	D<4>.PIN & !D<3>.PIN & D<2>.PIN & D<7>.PIN & 
	!SPDB2_OBUF.FBK.LFBK
	# D<1>.PIN & !D<0>.PIN & !CS & !A2 & A1 & !A0 & 
	D<4>.PIN & !D<3>.PIN & D<2>.PIN & !D<7>.PIN & 
	SPDB2_OBUF.FBK.LFBK;
   SPDB2.CLK = WR;
   SPDB2.AR = !RESET;

MACROCELL | 0 | 0 | D_0_IOBUFE
ATTRIBUTES | 265984 | 0
INPUTS | 8 | A1  | A0  | MR_0<0>  | MR_2<0>  | XLXN_8<0>  | MR_1<0>  | CS  | A2
INPUTMC | 1 | 2 | 7
INPUTP | 7 | 24 | 10 | 64 | 33 | 60 | 25 | 26
EQ | 5 | 
   D<0> = A1 & A0 & XLXN_8<0>
	# A1 & !A0 & MR_2<0>
	# !A1 & A0 & MR_1<0>
	# !A1 & !A0 & MR_0<0>;
   D<0>.OE = !CS & A2;

MACROCELL | 0 | 1 | D_1_IOBUFE
ATTRIBUTES | 265984 | 0
INPUTS | 8 | A1  | A0  | XLXN_8<1>  | MR_1<1>  | MR_0<1>  | MR_2<1>  | CS  | A2
INPUTMC | 1 | 2 | 6
INPUTP | 7 | 24 | 10 | 58 | 73 | 48 | 25 | 26
EQ | 5 | 
   D<1> = A1 & A0 & XLXN_8<1>
	# A1 & !A0 & MR_2<1>
	# !A1 & A0 & MR_1<1>
	# !A1 & !A0 & MR_0<1>;
   D<1>.OE = !CS & A2;

MACROCELL | 0 | 2 | D_2_IOBUFE
ATTRIBUTES | 265984 | 0
INPUTS | 8 | A1  | A0  | MR_0<2>  | MR_2<2>  | XLXN_8<2>  | MR_1<2>  | CS  | A2
INPUTMC | 1 | 3 | 8
INPUTP | 7 | 24 | 10 | 67 | 47 | 65 | 25 | 26
EQ | 5 | 
   D<2> = A1 & A0 & XLXN_8<2>
	# A1 & !A0 & MR_2<2>
	# !A1 & A0 & MR_1<2>
	# !A1 & !A0 & MR_0<2>;
   D<2>.OE = !CS & A2;

MACROCELL | 3 | 15 | D<3>_BUFR.MC
ATTRIBUTES | 133888 | 0
OUTPUTMC | 1 | 0 | 3
INPUTS | 6 | A1  | A0  | MR_0<3>  | MR_2<3>  | MR_1<3>  | XLXN_8<3>.FBK.LFBK
INPUTMC | 1 | 3 | 7
INPUTP | 5 | 24 | 10 | 74 | 31 | 66
EQ | 4 | 
   D<3>_BUFR = A1 & A0 & XLXN_8<3>.FBK.LFBK
	# A1 & !A0 & MR_2<3>
	# !A1 & A0 & MR_1<3>
	# !A1 & !A0 & MR_0<3>;

MACROCELL | 3 | 14 | D<4>_BUFR.MC
ATTRIBUTES | 133888 | 0
OUTPUTMC | 1 | 0 | 4
INPUTS | 6 | A1  | A0  | MR_0<4>  | MR_2<4>  | XLXN_8<4>  | MR_1<4>
INPUTMC | 1 | 2 | 5
INPUTP | 5 | 24 | 10 | 77 | 44 | 61
EQ | 4 | 
   D<4>_BUFR = A1 & A0 & XLXN_8<4>
	# A1 & !A0 & MR_2<4>
	# !A1 & A0 & MR_1<4>
	# !A1 & !A0 & MR_0<4>;

MACROCELL | 2 | 15 | D<5>_BUFR.MC
ATTRIBUTES | 133888 | 0
OUTPUTMC | 1 | 0 | 5
INPUTS | 6 | A1  | A0  | MR_0<5>  | MR_2<5>  | MR_1<5>  | XLXN_8<5>.FBK.LFBK
INPUTMC | 1 | 2 | 4
INPUTP | 5 | 24 | 10 | 71 | 43 | 69
EQ | 4 | 
   D<5>_BUFR = A1 & A0 & XLXN_8<5>.FBK.LFBK
	# A1 & !A0 & MR_2<5>
	# !A1 & A0 & MR_1<5>
	# !A1 & !A0 & MR_0<5>;

MACROCELL | 3 | 13 | D<6>_BUFR.MC
ATTRIBUTES | 133888 | 0
OUTPUTMC | 1 | 0 | 6
INPUTS | 6 | A1  | A0  | MR_0<6>  | MR_2<6>  | XLXN_8<6>  | MR_1<6>
INPUTMC | 1 | 2 | 3
INPUTP | 5 | 24 | 10 | 81 | 29 | 70
EQ | 4 | 
   D<6>_BUFR = A1 & A0 & XLXN_8<6>
	# A1 & !A0 & MR_2<6>
	# !A1 & A0 & MR_1<6>
	# !A1 & !A0 & MR_0<6>;

MACROCELL | 2 | 14 | D<7>_BUFR.MC
ATTRIBUTES | 133888 | 0
OUTPUTMC | 1 | 0 | 7
INPUTS | 6 | A1  | A0  | MR_0<7>  | MR_2<7>  | MR_1<7>  | XLXN_8<7>.FBK.LFBK
INPUTMC | 1 | 2 | 2
INPUTP | 5 | 24 | 10 | 78 | 37 | 62
EQ | 4 | 
   D<7>_BUFR = A1 & A0 & XLXN_8<7>.FBK.LFBK
	# A1 & !A0 & MR_2<7>
	# !A1 & A0 & MR_1<7>
	# !A1 & !A0 & MR_0<7>;

MACROCELL | 2 | 13 | XLXI_57/Q41<0>
ATTRIBUTES | 4391728 | 0
OUTPUTMC | 3 | 2 | 12 | 2 | 11 | 2 | 5
INPUTS | 4 | MA1  | MB1  | CLR1  | XLXI_57/Q41<2>/XLXI_57/Q41<2>_CLKF__$INT.FBK.LFBK
INPUTMC | 2 | 1 | 15 | 2 | 1
INPUTP | 2 | 57 | 55
EQ | 4 | 
   XLXI_57/Q41<0>.T = MA1 & !MB1
	# !MA1 & MB1;
   XLXI_57/Q41<0>.CLK = !XLXI_57/Q41<2>/XLXI_57/Q41<2>_CLKF__$INT.FBK.LFBK;
   XLXI_57/Q41<0>.AR = CLR1;

MACROCELL | 3 | 12 | XLXI_57/Q4<0>
ATTRIBUTES | 4391728 | 0
OUTPUTMC | 3 | 2 | 7 | 3 | 11 | 3 | 10
INPUTS | 4 | MA0  | MB0  | CLR0  | XLXI_57/Q4<2>/XLXI_57/Q4<2>_CLKF__$INT.FBK.LFBK
INPUTMC | 2 | 1 | 16 | 3 | 6
INPUTP | 2 | 59 | 50
EQ | 4 | 
   XLXI_57/Q4<0>.T = MA0 & !MB0
	# !MA0 & MB0;
   XLXI_57/Q4<0>.CLK = !XLXI_57/Q4<2>/XLXI_57/Q4<2>_CLKF__$INT.FBK.LFBK;
   XLXI_57/Q4<0>.AR = CLR0;

MACROCELL | 2 | 12 | XLXI_57/Q41<1>
ATTRIBUTES | 4391728 | 0
OUTPUTMC | 2 | 2 | 11 | 2 | 4
INPUTS | 5 | XLXI_57/Q41<2>/XLXI_57/Q41<2>_CLKF__$INT.FBK.LFBK  | MA1  | MB1  | CLR1  | XLXI_57/Q41<0>.FBK.LFBK
INPUTMC | 3 | 2 | 1 | 1 | 15 | 2 | 13
INPUTP | 2 | 57 | 55
EQ | 4 | 
   XLXI_57/Q41<1>.T = MA1 & !MB1 & XLXI_57/Q41<0>.FBK.LFBK
	# !MA1 & MB1 & !XLXI_57/Q41<0>.FBK.LFBK;

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