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xilinx xc9572 cpld 实现的伺服电机控制器

Pin Freeze File:  version G.35

9572100TQ XC9572-10-TQ100
A0 S:PIN12
A1 S:PIN27
A2 S:PIN29
CLK8 S:PIN22
CS S:PIN28
INT_L0 S:PIN10
MA0 S:PIN65
MA1 S:PIN63
MB0 S:PIN56
MB1 S:PIN61
MC0 S:PIN55
MC1 S:PIN52
MR_0<0> S:PIN70
MR_0<1> S:PIN81
MR_0<2> S:PIN74
MR_0<3> S:PIN82
MR_0<4> S:PIN85
MR_0<5> S:PIN78
MR_0<6> S:PIN89
MR_0<7> S:PIN86
MR_1<0> S:PIN66
MR_1<1> S:PIN64
MR_1<2> S:PIN71
MR_1<3> S:PIN72
MR_1<4> S:PIN67
MR_1<5> S:PIN76
MR_1<6> S:PIN77
MR_1<7> S:PIN68
MR_2<0> S:PIN37
MR_2<1> S:PIN54
MR_2<2> S:PIN53
MR_2<3> S:PIN35
MR_2<4> S:PIN50
MR_2<5> S:PIN49
MR_2<6> S:PIN32
MR_2<7> S:PIN41
RD S:PIN23
RESET S:PIN99
WR S:PIN9
ALMR S:PIN6
CLK S:PIN8
CS1 S:PIN97
D<0> S:PIN16
D<1> S:PIN13
D<2> S:PIN18
INT0 S:PIN11
M1CLR S:PIN93
M1PS S:PIN87
M1SG S:PIN91
M2CLR S:PIN39
M2PS S:PIN58
M2SG S:PIN40
PC1ON S:PIN96
PC2ON S:PIN79
REL0 S:PIN92
SEN0 S:PIN90
SEN1 S:PIN95
SEN2 S:PIN36
SPD2A S:PIN60
SPDA1 S:PIN94
SPDB1 S:PIN59
SPDB2 S:PIN42
UART0 S:PIN30
D<3> S:PIN20
D<7> S:PIN17
D<6> S:PIN25
D<5> S:PIN15
D<4> S:PIN14


;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit.

PARTITION FB1_1 D_0_IOBUFE D_1_IOBUFE D_2_IOBUFE _10_
		 _9_ _8_ _7_ _6_
		
PARTITION FB1_13 SEN2_OBUF
PARTITION FB1_16 M2CLR_OBUF UART0_OBUF M2SG_OBUF
PARTITION FB2_1 M1PS_OBUF SPDA1_OBUF M1SG_OBUF M1CLR_OBUF
		 SEN1_OBUF PC1ON_OBUF
PARTITION FB2_8 CS1_OBUF
PARTITION FB2_10 CS_U CSA2 ALMR_OBUF CLK8_IBUF$BUF0
		 CSA1 INT_L0_IBUF$BUF0 CLR1 CLR0
		 REL0_OBUF
PARTITION FB3_2 XLXI_57/Q41<2>/XLXI_57/Q41<2>_CLKF__$INT XLXN_8<7> XLXN_8<6> XLXN_8<5>
		 XLXN_8<4> XLXN_8<1> XLXN_8<0> SPDB2_OBUF
		 SPD2A_OBUF XLXI_57/Q41<3> XLXI_57/Q41<2> XLXI_57/Q41<1>
		 XLXI_57/Q41<0> D<7>_BUFR.MC D<5>_BUFR.MC M2PS_OBUF
		 SPDB1_OBUF
PARTITION FB4_7 XLXI_57/Q4<2>/XLXI_57/Q4<2>_CLKF__$INT XLXN_8<3> XLXN_8<2> XLXI_57/Q4<3>
		 XLXI_57/Q4<2> XLXI_57/Q4<1> XLXI_57/Q4<0> D<6>_BUFR.MC
		 D<4>_BUFR.MC D<3>_BUFR.MC SEN0_OBUF PC2ON_OBUF