📄 dq24.rpt
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FDCPE_DQ18: FDCPE port map (DQ18,DQ18_D,WR,REST,'0');
DQ18_D <= ((D AND Din(18))
OR (NOT Din(18) AND DQ18_OBUF.FBK.LFBK));
FDCPE_DQ19: FDCPE port map (DQ19,DQ19_D,WR,REST,'0');
DQ19_D <= ((D AND Din(19))
OR (NOT Din(19) AND DQ19_OBUF.FBK.LFBK));
FDCPE_DQ1: FDCPE port map (DQ1,DQ1_D,WR,REST,'0');
DQ1_D <= ((D AND Din(1))
OR (NOT Din(1) AND DQ1_OBUF.FBK.LFBK));
FDCPE_DQ20: FDCPE port map (DQ20,DQ20_D,WR,REST,'0');
DQ20_D <= ((D AND Din(20))
OR (NOT Din(20) AND DQ20_OBUF.FBK.LFBK));
FDCPE_DQ21: FDCPE port map (DQ21,DQ21_D,WR,REST,'0');
DQ21_D <= ((D AND Din(21))
OR (NOT Din(21) AND DQ21_OBUF.FBK.LFBK));
FDCPE_DQ22: FDCPE port map (DQ22,DQ22_D,WR,REST,'0');
DQ22_D <= ((D AND Din(22))
OR (NOT Din(22) AND DQ22_OBUF.FBK.LFBK));
FDCPE_DQ23: FDCPE port map (DQ23,DQ23_D,WR,REST,'0');
DQ23_D <= ((D AND Din(23))
OR (NOT Din(23) AND DQ23_OBUF.FBK.LFBK));
FDCPE_DQ2: FDCPE port map (DQ2,DQ2_D,WR,REST,'0');
DQ2_D <= ((D AND Din(2))
OR (NOT Din(2) AND DQ2_OBUF.FBK.LFBK));
FDCPE_DQ3: FDCPE port map (DQ3,DQ3_D,WR,REST,'0');
DQ3_D <= ((D AND Din(3))
OR (NOT Din(3) AND DQ3_OBUF.FBK.LFBK));
FDCPE_DQ4: FDCPE port map (DQ4,DQ4_D,WR,REST,'0');
DQ4_D <= ((D AND Din(4))
OR (NOT Din(4) AND DQ4_OBUF.FBK.LFBK));
FDCPE_DQ5: FDCPE port map (DQ5,DQ5_D,WR,REST,'0');
DQ5_D <= ((D AND Din(5))
OR (NOT Din(5) AND DQ5_OBUF.FBK.LFBK));
FDCPE_DQ6: FDCPE port map (DQ6,DQ6_D,WR,REST,'0');
DQ6_D <= ((D AND Din(6))
OR (NOT Din(6) AND DQ6_OBUF.FBK.LFBK));
FDCPE_DQ7: FDCPE port map (DQ7,DQ7_D,WR,REST,'0');
DQ7_D <= ((D AND Din(7))
OR (NOT Din(7) AND DQ7_OBUF.FBK.LFBK));
FDCPE_DQ8: FDCPE port map (DQ8,DQ8_D,WR,REST,'0');
DQ8_D <= ((D AND Din(8))
OR (NOT Din(8) AND DQ8_OBUF.FBK.LFBK));
FDCPE_DQ9: FDCPE port map (DQ9,DQ9_D,WR,REST,'0');
DQ9_D <= ((D AND Din(9))
OR (NOT Din(9) AND DQ9_OBUF.FBK.LFBK));
Register Legend:
FDCPE (Q,D,C,CLR,PRE);
FTCPE (Q,D,C,CLR,PRE);
LDCP (Q,D,G,CLR,PRE);
**************************** Device Pin Out ****************************
Device : XC9572-10-TQ100
--------------------------------------------------
/100 98 96 94 92 90 88 86 84 82 80 78 76 \
| 99 97 95 93 91 89 87 85 83 81 79 77 |
| 1 75 |
| 2 74 |
| 3 73 |
| 4 72 |
| 5 71 |
| 6 70 |
| 7 69 |
| 8 68 |
| 9 67 |
| 10 66 |
| 11 65 |
| 12 64 |
| 13 XC9572-10-TQ100 63 |
| 14 62 |
| 15 61 |
| 16 60 |
| 17 59 |
| 18 58 |
| 19 57 |
| 20 56 |
| 21 55 |
| 22 54 |
| 23 53 |
| 24 52 |
| 25 51 |
| 27 29 31 33 35 37 39 41 43 45 47 49 |
\26 28 30 32 34 36 38 40 42 44 46 48 50 /
--------------------------------------------------
Pin Signal Pin Signal
No. Name No. Name
1 DQ7 51 VCC
2 NC 52 Din<7>
3 TIE 53 TIE
4 TIE 54 DQ13
5 VCC 55 Din<23>
6 TIE 56 Din<17>
7 NC 57 VCC
8 TIE 58 Din<16>
9 DQ8 59 TIE
10 TIE 60 DQ14
11 Din<19> 61 TIE
12 DQ4 62 GND
13 Din<4> 63 DQ15
14 Din<5> 64 Din<18>
15 Din<22> 65 DQ16
16 DQ18 66 DQ10
17 Din<20> 67 Din<11>
18 TIE 68 Din<9>
19 NC 69 GND
20 DQ19 70 Din<12>
21 GND 71 TIE
22 WR 72 DQ12
23 TIE 73 NC
24 NC 74 Din<1>
25 DQ1 75 GND
26 VCC 76 TIE
27 TIE 77 DQ22
28 DQ20 78 Din<14>
29 Din<21> 79 TIE
30 Din<10> 80 NC
31 GND 81 DQ23
32 D 82 TIE
33 TIE 83 TDO
34 NC 84 GND
35 Din<13> 85 DQ2
36 DQ17 86 DQ3
37 Din<2> 87 TIE
38 VCC 88 VCC
39 DQ21 89 Din<0>
40 TIE 90 Din<6>
41 DQ0 91 Din<3>
42 Din<8> 92 TIE
43 NC 93 TIE
44 GND 94 DQ9
45 TDI 95 DQ5
46 NC 96 Din<15>
47 TMS 97 DQ6
48 TCK 98 VCC
49 TIE 99 REST
50 DQ11 100 GND
Legend : NC = Not Connected, unbonded pin
PGND = Unused I/O configured as additional Ground pin
TIE = Unused I/O floating -- must tie to VCC, GND or other signal
VCC = Dedicated Power Pin
GND = Dedicated Ground Pin
TDI = Test Data In, JTAG pin
TDO = Test Data Out, JTAG pin
TCK = Test Clock, JTAG pin
TMS = Test Mode Select, JTAG pin
PE = Port Enable pin
PROHIBITED = User reserved pin
**************************** Compiler Options ****************************
Following is a list of all global compiler options used by the fitter run.
Device(s) Specified : xc9572-10-TQ100
Optimization Method : SPEED
Multi-Level Logic Optimization : ON
Ignore Timing Specifications : OFF
Default Register Power Up Value : LOW
Keep User Location Constraints : ON
What-You-See-Is-What-You-Get : OFF
Exhaustive Fitting : OFF
Keep Unused Inputs : OFF
Slew Rate : FAST
Power Mode : STD
Ground on Unused IOs : OFF
Global Clock Optimization : ON
Global Set/Reset Optimization : ON
Global Ouput Enable Optimization : ON
FASTConnect/UIM optimzation : ON
Local Feedback : ON
Pin Feedback : ON
Input Limit : 36
Pterm Limit : 25
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