d524wave.vhw

xilinx xc9572 cpld 实现的伺服电机控制器

-- D:\FPGA\TEST\XC_9572
-- VHDL Test Bench created by
-- HDL Bencher 6.1i
-- Fri Apr 07 10:07:45 2006
-- 
-- Notes:
-- 1) This testbench has been automatically generated from
--   your Test Bench Waveform
-- 2) To use this as a user modifiable testbench do the following:
--   - Save it as a file with a .vhd extension (i.e. File->Save As...)
--   - Add it to your project as a testbench source (i.e. Project->Add Source...)
-- 

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.NUMERIC_STD.ALL;
USE IEEE.STD_LOGIC_TEXTIO.ALL;
USE STD.TEXTIO.ALL;

ENTITY d524wave IS
END d524wave;

ARCHITECTURE testbench_arch OF d524wave IS
-- If you get a compiler error on the following line,
-- from the menu do Options->Configuration select VHDL 87
FILE RESULTS: TEXT OPEN WRITE_MODE IS "results.txt";
	COMPONENT d5_32e
		PORT (
			A0 : In  std_logic;
			A1 : In  std_logic;
			A2 : In  std_logic;
			A3 : In  std_logic;
			A4 : In  std_logic;
			E : In  std_logic;
			Dout : Out  std_logic_vector (23 DOWNTO 0)
		);
	END COMPONENT;

	SIGNAL A0 : std_logic;
	SIGNAL A1 : std_logic;
	SIGNAL A2 : std_logic;
	SIGNAL A3 : std_logic;
	SIGNAL A4 : std_logic;
	SIGNAL E : std_logic;
	SIGNAL Dout : std_logic_vector (23 DOWNTO 0);

BEGIN
	UUT : d5_32e
	PORT MAP (
		A0 => A0,
		A1 => A1,
		A2 => A2,
		A3 => A3,
		A4 => A4,
		E => E,
		Dout => Dout
	);

	PROCESS
		VARIABLE TX_OUT : LINE;
		VARIABLE TX_ERROR : INTEGER := 0;

		PROCEDURE CHECK_Dout(
			next_Dout : std_logic_vector (23 DOWNTO 0);
			TX_TIME : INTEGER
		) IS
			VARIABLE TX_STR : String(1 to 4096);
			VARIABLE TX_LOC : LINE;
		BEGIN
			-- If compiler error ("/=" is ambiguous) occurs in the next line of code
			-- change compiler settings to use explicit declarations only
			IF (Dout /= next_Dout) THEN 
				STD.TEXTIO.write(TX_LOC,string'("Error at time="));
				STD.TEXTIO.write(TX_LOC, TX_TIME);
				STD.TEXTIO.write(TX_LOC,string'("ns Dout="));
				IEEE.STD_LOGIC_TEXTIO.write(TX_LOC, Dout);
				STD.TEXTIO.write(TX_LOC, string'(", Expected = "));
				IEEE.STD_LOGIC_TEXTIO.write(TX_LOC, next_Dout);
				STD.TEXTIO.write(TX_LOC, string'(" "));
				TX_STR(TX_LOC.all'range) := TX_LOC.all;
				STD.TEXTIO.writeline(results, TX_LOC);
				STD.TEXTIO.Deallocate(TX_LOC);
				ASSERT (FALSE) REPORT TX_STR SEVERITY ERROR;
				TX_ERROR := TX_ERROR + 1;
			END IF;
		END;

		BEGIN
		-- --------------------
		A0 <= transport '0';
		A1 <= transport '0';
		A2 <= transport '0';
		A3 <= transport '0';
		A4 <= transport '0';
		E <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=100 ns
		E <= transport '0';
		-- --------------------
		WAIT FOR 100 ns; -- Time=200 ns
		A0 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=300 ns
		A0 <= transport '0';
		A1 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=400 ns
		A0 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=500 ns
		A0 <= transport '0';
		A1 <= transport '0';
		A2 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=600 ns
		A0 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=700 ns
		A0 <= transport '0';
		A1 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=800 ns
		A0 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=900 ns
		A0 <= transport '0';
		A1 <= transport '0';
		A2 <= transport '0';
		A3 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=1000 ns
		A0 <= transport '1';
		A2 <= transport '0';
		-- --------------------
		WAIT FOR 100 ns; -- Time=1100 ns
		A0 <= transport '0';
		A1 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=1200 ns
		A0 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=1300 ns
		A0 <= transport '0';
		A1 <= transport '0';
		A2 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=1400 ns
		A0 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=1500 ns
		A0 <= transport '0';
		A1 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=1600 ns
		A0 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=1700 ns
		A0 <= transport '0';
		A1 <= transport '0';
		A2 <= transport '0';
		A3 <= transport '0';
		A4 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=1800 ns
		A0 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=1900 ns
		A0 <= transport '0';
		A1 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=2000 ns
		A0 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=2100 ns
		A0 <= transport '0';
		A1 <= transport '0';
		A2 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=2200 ns
		A0 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=2300 ns
		A0 <= transport '0';
		A1 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=2400 ns
		A0 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=2500 ns
		A0 <= transport '0';
		A1 <= transport '0';
		A2 <= transport '0';
		A3 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=2600 ns
		A0 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=2700 ns
		A0 <= transport '0';
		A1 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=2800 ns
		A0 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=2900 ns
		A0 <= transport '0';
		A1 <= transport '0';
		A2 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=3000 ns
		A0 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=3100 ns
		A0 <= transport '0';
		A1 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=3200 ns
		A0 <= transport '1';
		A1 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=3300 ns
		A0 <= transport '0';
		A1 <= transport '0';
		A2 <= transport '0';
		A3 <= transport '0';
		A4 <= transport '0';
		-- --------------------
		WAIT FOR 100 ns; -- Time=3400 ns
		A0 <= transport '1';
		-- --------------------
		WAIT FOR 100 ns; -- Time=3500 ns
		-- --------------------

		IF (TX_ERROR = 0) THEN 
			STD.TEXTIO.write(TX_OUT,string'("No errors or warnings"));
			STD.TEXTIO.writeline(results, TX_OUT);
			ASSERT (FALSE) REPORT
				"Simulation successful (not a failure).  No problems detected. "
				SEVERITY FAILURE;
		ELSE
			STD.TEXTIO.write(TX_OUT, TX_ERROR);
			STD.TEXTIO.write(TX_OUT, string'(
				" errors found in simulation"));
			STD.TEXTIO.writeline(results, TX_OUT);
			ASSERT (FALSE) REPORT
				"Errors found during simulation"
				SEVERITY FAILURE;
		END IF;
	END PROCESS;
END testbench_arch;

CONFIGURATION d5_32e_cfg OF d524wave IS
	FOR testbench_arch
	END FOR;
END d5_32e_cfg;