fdce.vhf

xilinx xc9572 cpld 实现的伺服电机控制器

--------------------------------------------------------------------------------
-- Copyright (c) 1995-2003 Xilinx, Inc.
-- All Right Reserved.
--------------------------------------------------------------------------------
--   ____  ____ 
--  /   /\/   / 
-- /___/  \  /    Vendor: Xilinx 
-- \   \   \/     Version : 6.3i
--  \   \         Application : 
--  /   /         Filename : fdce.vhf
-- /___/   /\     Timestamp : 04/03/2006 16:05:52
-- \   \  /  \ 
--  \___\/\___\ 
--
--Command: 
--Design Name: fdce
--

library ieee;
use ieee.std_logic_1164.ALL;
use ieee.numeric_std.ALL;
-- synopsys translate_off
library UNISIM;
use UNISIM.Vcomponents.ALL;
-- synopsys translate_on

entity fdce is
   port ( );
end fdce;

architecture BEHAVIORAL of fdce is
   attribute BOX_TYPE   : string ;
   component FDCE
      port ( C   : in    std_logic; 
             CE  : in    std_logic; 
             CLR : in    std_logic; 
             D   : in    std_logic; 
             Q   : out   std_logic);
   end component;
   attribute BOX_TYPE of FDCE : component is "BLACK_BOX";
   
begin
   XLXI_1 : FDCE
      port map (C=>open,      
                CE=>open,      
                CLR=>open,      
                D=>open,      
                Q=>open);
   
end BEHAVIORAL;