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来自「xilinx xc9572 cpld 实现的伺服电机控制器」· XML 代码 · 共 3 行 · 第 1/5 页
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<document><ascFile>top.rpt</ascFile><devFile>D:/Xilinx/xc9500/data/xc9572.chp</devFile><mfdFile>top.mfd</mfdFile><htmlFile logo="xc9500_logo.jpg" pin_legend="pinlegend.htm" logic_legend="logiclegend.htm"/><header pkg="TQ100" date=" 4-26-2006" time=" 9:26AM" speed="-10" design="top" device="XC9572" status="1" eqnType="1" version="1.0" statusStr="Successful" swVersion="G.35"/><inputs id="D1PIN_SPECSIG"/><inputs id="D0PIN_SPECSIG"/><inputs id="CS"/><inputs id="A2"/><inputs id="A1"/><inputs id="A0"/><inputs id="WR"/><inputs id="RESET"/><inputs id="D7PIN_SPECSIG"/><inputs id="D2PIN_SPECSIG"/><inputs id="D3PIN_SPECSIG"/><inputs id="D4PIN_SPECSIG"/><inputs id="MR_00_SPECSIG"/><inputs id="MR_20_SPECSIG"/><inputs id="MR_10_SPECSIG"/><inputs id="MR_11_SPECSIG"/><inputs id="MR_01_SPECSIG"/><inputs id="MR_21_SPECSIG"/><inputs id="MR_02_SPECSIG"/><inputs id="MR_22_SPECSIG"/><inputs id="MR_12_SPECSIG"/><inputs id="MR_03_SPECSIG"/><inputs id="MR_23_SPECSIG"/><inputs id="MR_13_SPECSIG"/><inputs id="MR_04_SPECSIG"/><inputs id="MR_24_SPECSIG"/><inputs id="MR_14_SPECSIG"/><inputs id="MR_05_SPECSIG"/><inputs id="MR_25_SPECSIG"/><inputs id="MR_15_SPECSIG"/><inputs id="MR_06_SPECSIG"/><inputs id="MR_26_SPECSIG"/><inputs id="MR_16_SPECSIG"/><inputs id="MR_07_SPECSIG"/><inputs id="MR_27_SPECSIG"/><inputs id="MR_17_SPECSIG"/><inputs id="MA1"/><inputs id="MB1"/><inputs id="MA0"/><inputs id="MB0"/><inputs id="MC0"/><inputs id="MC1"/><inputs id="RD"/><inputs id="CLK8"/><inputs id="INT_L0"/><pin id="FB1_MC1_PIN16" use="IO_SPECSIG" slew="SLOW" pinnum="16" signal="D0_SPECSIG"/><pin id="FB1_MC2_PIN13" use="IO_SPECSIG" slew="SLOW" pinnum="13" signal="D1_SPECSIG"/><pin id="FB1_MC3_PIN18" use="IO_SPECSIG" slew="SLOW" pinnum="18" signal="D2_SPECSIG"/><pin id="FB1_MC4_PIN20" use="IO_SPECSIG" slew="SLOW" pinnum="20" signal="D3_SPECSIG"/><pin id="FB1_MC5_PIN14" use="IO_SPECSIG" slew="SLOW" pinnum="14" signal="D4_SPECSIG"/><pin id="FB1_MC6_PIN15" use="O" slew="SLOW" pinnum="15" signal="D5_SPECSIG"/><pin id="FB1_MC7_PIN25" use="O" slew="SLOW" pinnum="25" signal="D6_SPECSIG"/><pin id="FB1_MC8_PIN17" use="IO_SPECSIG" slew="SLOW" pinnum="17" signal="D7_SPECSIG"/><pin id="FB1_MC9_PIN22" use="I" pinnum="22" signal="CLK8"/><pin id="FB1_MC10_PIN28" use="I" pinnum="28" signal="CS"/><pin id="FB1_MC11_PIN23" use="I" pinnum="23" signal="RD"/><pin id="FB1_MC12_PIN33" pinnum="33"/><pin id="FB1_MC13_PIN36" use="O" slew="SLOW" pinnum="36" signal="SEN2"/><pin id="FB1_MC14_PIN27" use="I" pinnum="27" signal="A1"/><pin id="FB1_MC15_PIN29" use="I" pinnum="29" signal="A2"/><pin id="FB1_MC16_PIN39" use="O" slew="SLOW" pinnum="39" signal="M2CLR"/><pin id="FB1_MC17_PIN30" use="O" slew="SLOW" pinnum="30" signal="UART0"/><pin id="FB1_MC18_PIN40" use="O" slew="SLOW" pinnum="40" signal="M2SG"/><pin id="FB2_MC1_PIN87" use="O" slew="SLOW" pinnum="87" signal="M1PS"/><pin id="FB2_MC2_PIN94" use="O" slew="SLOW" pinnum="94" signal="SPDA1"/><pin id="FB2_MC3_PIN91" use="O" slew="SLOW" pinnum="91" signal="M1SG"/><pin id="FB2_MC4_PIN93" use="O" slew="SLOW" pinnum="93" signal="M1CLR"/><pin id="FB2_MC5_PIN95" use="O" slew="SLOW" pinnum="95" signal="SEN1"/><pin id="FB2_MC6_PIN96" use="O" slew="SLOW" pinnum="96" signal="PC1ON"/><pin id="FB2_MC7_PIN3" pinnum="3"/><pin id="FB2_MC8_PIN97" use="O" slew="SLOW" pinnum="97" signal="CS1"/><pin id="FB2_MC9_PIN99" use="I" pinnum="99" signal="RESET"/><pin id="FB2_MC10_PIN1" use="b_SPECSIG" pinnum="1" signal="CS_U"/><pin id="FB2_MC11_PIN4" use="b_SPECSIG" pinnum="4" signal="CSA2"/><pin id="FB2_MC12_PIN6" use="O" slew="SLOW" pinnum="6" signal="ALMR"/><pin id="FB2_MC13_PIN8" use="O" slew="SLOW" pinnum="8" signal="CLK"/><pin id="FB2_MC14_PIN9" use="I" pinnum="9" signal="WR"/><pin id="FB2_MC15_PIN11" use="O" slew="SLOW" pinnum="11" signal="INT0"/><pin id="FB2_MC16_PIN10" use="I" pinnum="10" signal="INT_L0"/><pin id="FB2_MC17_PIN12" use="I" pinnum="12" signal="A0"/><pin id="FB2_MC18_PIN92" use="O" slew="SLOW" pinnum="92" signal="REL0"/><pin id="FB3_MC1_PIN41" use="I" pinnum="41" signal="MR_27_SPECSIG"/><pin id="FB3_MC2_PIN32" use="I" pinnum="32" signal="MR_26_SPECSIG"/><pin id="FB3_MC3_PIN49" use="I" pinnum="49" signal="MR_25_SPECSIG"/><pin id="FB3_MC4_PIN50" use="I" pinnum="50" signal="MR_24_SPECSIG"/><pin id="FB3_MC5_PIN35" use="I" pinnum="35" signal="MR_23_SPECSIG"/><pin id="FB3_MC6_PIN53" use="I" pinnum="53" signal="MR_22_SPECSIG"/><pin id="FB3_MC7_PIN54" use="I" pinnum="54" signal="MR_21_SPECSIG"/><pin id="FB3_MC8_PIN37" use="I" pinnum="37" signal="MR_20_SPECSIG"/><pin id="FB3_MC9_PIN42" use="O" slew="SLOW" pinnum="42" signal="SPDB2"/><pin id="FB3_MC10_PIN60" use="O" slew="SLOW" pinnum="60" signal="SPD2A"/><pin id="FB3_MC11_PIN52" use="I" pinnum="52" signal="MC1"/><pin id="FB3_MC12_PIN61" use="I" pinnum="61" signal="MB1"/><pin id="FB3_MC13_PIN63" use="I" pinnum="63" signal="MA1"/><pin id="FB3_MC14_PIN55" use="I" pinnum="55" signal="MC0"/><pin id="FB3_MC15_PIN56" use="I" pinnum="56" signal="MB0"/><pin id="FB3_MC16_PIN65" use="I" pinnum="65" signal="MA0"/><pin id="FB3_MC17_PIN58" use="O" slew="SLOW" pinnum="58" signal="M2PS"/><pin id="FB3_MC18_PIN59" use="O" slew="SLOW" pinnum="59" signal="SPDB1"/><pin id="FB4_MC1_PIN66" use="I" pinnum="66" signal="MR_10_SPECSIG"/><pin id="FB4_MC2_PIN64" use="I" pinnum="64" signal="MR_11_SPECSIG"/><pin id="FB4_MC3_PIN71" use="I" pinnum="71" signal="MR_12_SPECSIG"/><pin id="FB4_MC4_PIN72" use="I" pinnum="72" signal="MR_13_SPECSIG"/><pin id="FB4_MC5_PIN67" use="I" pinnum="67" signal="MR_14_SPECSIG"/><pin id="FB4_MC6_PIN76" use="I" pinnum="76" signal="MR_15_SPECSIG"/><pin id="FB4_MC7_PIN77" use="I" pinnum="77" signal="MR_16_SPECSIG"/><pin id="FB4_MC8_PIN68" use="I" pinnum="68" signal="MR_17_SPECSIG"/><pin id="FB4_MC9_PIN70" use="I" pinnum="70" signal="MR_00_SPECSIG"/><pin id="FB4_MC10_PIN81" use="I" pinnum="81" signal="MR_01_SPECSIG"/><pin id="FB4_MC11_PIN74" use="I" pinnum="74" signal="MR_02_SPECSIG"/><pin id="FB4_MC12_PIN82" use="I" pinnum="82" signal="MR_03_SPECSIG"/><pin id="FB4_MC13_PIN85" use="I" pinnum="85" signal="MR_04_SPECSIG"/><pin id="FB4_MC14_PIN78" use="I" pinnum="78" signal="MR_05_SPECSIG"/><pin id="FB4_MC15_PIN89" use="I" pinnum="89" signal="MR_06_SPECSIG"/><pin id="FB4_MC16_PIN86" use="I" pinnum="86" signal="MR_07_SPECSIG"/><pin id="FB4_MC17_PIN90" use="O" slew="SLOW" pinnum="90" signal="SEN0"/><pin id="FB4_MC18_PIN79" use="O" slew="SLOW" pinnum="79" signal="PC2ON"/><fblock id="FB1" pinUse="17" inputUse="35"><macrocell id="FB1_MC1" pin="FB1_MC1_PIN16" sigUse="8" signal="D0_SPECSIG"><pterms pt1="FB1_1_1" pt2="FB1_1_2" pt3="FB1_1_3" pt4="FB1_1_4" pt5="FB1_1_5"/></macrocell><macrocell id="FB1_MC2" pin="FB1_MC2_PIN13" sigUse="8" signal="D1_SPECSIG"><pterms pt1="FB1_2_1" pt2="FB1_2_2" pt3="FB1_2_3" pt4="FB1_2_4" pt5="FB1_2_5"/></macrocell><macrocell id="FB1_MC3" pin="FB1_MC3_PIN18" sigUse="8" signal="D2_SPECSIG"><pterms pt1="FB1_3_1" pt2="FB1_3_2" pt3="FB1_3_3" pt4="FB1_3_4" pt5="FB1_3_5"/></macrocell><macrocell id="FB1_MC4" pin="FB1_MC4_PIN20" sigUse="3" signal="D3_SPECSIG"><pterms pt1="FB1_4_1" pt2="FB1_4_2"/></macrocell><macrocell id="FB1_MC5" pin="FB1_MC5_PIN14" sigUse="3" signal="D4_SPECSIG"><pterms pt1="FB1_5_1" pt2="FB1_5_2"/></macrocell><macrocell id="FB1_MC6" pin="FB1_MC6_PIN15" sigUse="3" signal="D5_SPECSIG"><pterms pt1="FB1_6_1" pt2="FB1_6_2"/></macrocell><macrocell id="FB1_MC7" pin="FB1_MC7_PIN25" sigUse="3" signal="D6_SPECSIG"><pterms pt1="FB1_7_1" pt2="FB1_7_2"/></macrocell><macrocell id="FB1_MC8" pin="FB1_MC8_PIN17" sigUse="3" signal="D7_SPECSIG"><pterms pt1="FB1_8_1" pt2="FB1_8_2"/></macrocell><macrocell id="FB1_MC9" pin="FB1_MC9_PIN22"/><macrocell id="FB1_MC10" pin="FB1_MC10_PIN28"/><macrocell id="FB1_MC11" pin="FB1_MC11_PIN23"/><macrocell id="FB1_MC12" pin="FB1_MC12_PIN33"/><macrocell id="FB1_MC13" pin="FB1_MC13_PIN36" sigUse="13" signal="SEN2"><pterms pt1="FB1_13_1" pt2="FB1_13_2" pt3="FB1_13_3" pt4="FB1_13_4"/></macrocell><macrocell id="FB1_MC14" pin="FB1_MC14_PIN27"/><macrocell id="FB1_MC15" pin="FB1_MC15_PIN29"/><macrocell id="FB1_MC16" pin="FB1_MC16_PIN39" sigUse="13" signal="M2CLR"><pterms pt1="FB1_16_1" pt2="FB1_16_2" pt3="FB1_16_3" pt4="FB1_16_4"/></macrocell><macrocell id="FB1_MC17" pin="FB1_MC17_PIN30" sigUse="6" signal="UART0"><pterms pt1="FB1_17_1" pt2="FB1_17_2" pt3="FB1_17_3"/></macrocell><macrocell id="FB1_MC18" pin="FB1_MC18_PIN40" sigUse="13" signal="M2SG"><pterms pt1="FB1_18_1" pt2="FB1_18_2" pt3="FB1_18_3" pt4="FB1_18_4"/></macrocell><fbinput id="FB1_I1" signal="A0"/><fbinput id="FB1_I2" signal="A1"/><fbinput id="FB1_I3" signal="A2"/><fbinput id="FB1_I4" signal="CSA1"/><fbinput id="FB1_I5" signal="CSA2"/><fbinput id="FB1_I6" signal="CS"/><fbinput id="FB1_I7" signal="CS_U"/><fbinput id="FB1_I8" signal="D3_BUFR_SPECSIG"/><fbinput id="FB1_I9" signal="D4_BUFR_SPECSIG"/><fbinput id="FB1_I10" signal="D5_BUFR_SPECSIG"/><fbinput id="FB1_I11" signal="D6_BUFR_SPECSIG"/><fbinput id="FB1_I12" signal="D7_BUFR_SPECSIG"/><fbinput id="FB1_I13" fbk="LFBK" signal="M2CLR_OBUFFBKLFBK_SPECSIG"/><fbinput id="FB1_I14" fbk="LFBK" signal="M2SG_OBUFFBKLFBK_SPECSIG"/><fbinput id="FB1_I15" signal="MR_00_SPECSIG"/><fbinput id="FB1_I16" signal="MR_01_SPECSIG"/><fbinput id="FB1_I17" signal="MR_02_SPECSIG"/><fbinput id="FB1_I18" signal="MR_10_SPECSIG"/><fbinput id="FB1_I19" signal="MR_11_SPECSIG"/><fbinput id="FB1_I20" signal="MR_12_SPECSIG"/><fbinput id="FB1_I21" signal="MR_20_SPECSIG"/><fbinput id="FB1_I22" signal="MR_21_SPECSIG"/><fbinput id="FB1_I23" signal="MR_22_SPECSIG"/><fbinput id="FB1_I24" fbk="PIN" signal="D0PIN_SPECSIG"/><fbinput id="FB1_I25" fbk="PIN" signal="D1PIN_SPECSIG"/><fbinput id="FB1_I26" fbk="PIN" signal="D2PIN_SPECSIG"/><fbinput id="FB1_I27" fbk="PIN" signal="D3PIN_SPECSIG"/><fbinput id="FB1_I28" fbk="PIN" signal="D4PIN_SPECSIG"/><fbinput id="FB1_I29" fbk="PIN" signal="D7PIN_SPECSIG"/><fbinput id="FB1_I30" signal="RESET"/><fbinput id="FB1_I31" fbk="LFBK" signal="SEN2_OBUFFBKLFBK_SPECSIG"/><fbinput id="FB1_I32" signal="WR"/><fbinput id="FB1_I33" signal="XLXN_80_SPECSIG"/><fbinput id="FB1_I34" signal="XLXN_81_SPECSIG"/><fbinput id="FB1_I35" signal="XLXN_82_SPECSIG"/><pterm id="FB1_1_1"><signal id="A1"/><signal id="A0"/><signal id="XLXN_80_SPECSIG"/></pterm><pterm id="FB1_1_2"><signal id="A1"/><signal id="A0" negated="ON"/><signal id="MR_20_SPECSIG"/></pterm><pterm id="FB1_1_3"><signal id="A1" negated="ON"/><signal id="A0"/><signal id="MR_10_SPECSIG"/></pterm><pterm id="FB1_1_4"><signal id="A1" negated="ON"/><signal id="A0" negated="ON"/><signal id="MR_00_SPECSIG"/></pterm><pterm id="FB1_1_5"><signal id="CS" negated="ON"/><signal id="A2"/></pterm><pterm id="FB1_2_1"><signal id="A1"/><signal id="A0"/><signal id="XLXN_81_SPECSIG"/></pterm><pterm id="FB1_2_2"><signal id="A1"/><signal id="A0" negated="ON"/><signal id="MR_21_SPECSIG"/></pterm><pterm id="FB1_2_3"><signal id="A1" negated="ON"/><signal id="A0"/><signal id="MR_11_SPECSIG"/></pterm><pterm id="FB1_2_4"><signal id="A1" negated="ON"/><signal id="A0" negated="ON"/><signal id="MR_01_SPECSIG"/></pterm><pterm id="FB1_2_5"><signal id="CS" negated="ON"/><signal id="A2"/></pterm><pterm id="FB1_3_1"><signal id="A1"/><signal id="A0"/><signal id="XLXN_82_SPECSIG"/></pterm><pterm id="FB1_3_2"><signal id="A1"/><signal id="A0" negated="ON"/><signal id="MR_22_SPECSIG"/></pterm><pterm id="FB1_3_3"><signal id="A1" negated="ON"/><signal id="A0"/><signal id="MR_12_SPECSIG"/></pterm><pterm id="FB1_3_4"><signal id="A1" negated="ON"/><signal id="A0" negated="ON"/><signal id="MR_02_SPECSIG"/></pterm><pterm id="FB1_3_5"><signal id="CS" negated="ON"/><signal id="A2"/></pterm><pterm id="FB1_4_1"><signal id="D3_BUFR_SPECSIG"/></pterm><pterm id="FB1_4_2"><signal id="CS" negated="ON"/><signal id="A2"/></pterm><pterm id="FB1_5_1"><signal id="D4_BUFR_SPECSIG"/></pterm><pterm id="FB1_5_2"><signal id="CS" negated="ON"/><signal id="A2"/></pterm><pterm id="FB1_6_1"><signal id="D5_BUFR_SPECSIG"/></pterm><pterm id="FB1_6_2"><signal id="CS" negated="ON"/><signal id="A2"/></pterm><pterm id="FB1_7_1"><signal id="D6_BUFR_SPECSIG"/></pterm><pterm id="FB1_7_2"><signal id="CS" negated="ON"/><signal id="A2"/></pterm><pterm id="FB1_8_1"><signal id="D7_BUFR_SPECSIG"/></pterm><pterm id="FB1_8_2"><signal id="CS" negated="ON"/><signal id="A2"/></pterm><pterm id="FB1_13_1"><signal id="D1PIN_SPECSIG"/><signal id="D0PIN_SPECSIG"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG"/><signal id="SEN2_OBUFFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB1_13_2"><signal id="D1PIN_SPECSIG"/><signal id="D0PIN_SPECSIG"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="SEN2_OBUFFBKLFBK_SPECSIG"/></pterm><pterm id="FB1_13_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB1_13_4"><signal id="WR"/></pterm><pterm id="FB1_16_1"><signal id="D1PIN_SPECSIG"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG"/><signal id="M2CLR_OBUFFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB1_16_2"><signal id="D1PIN_SPECSIG"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="M2CLR_OBUFFBKLFBK_SPECSIG"/></pterm><pterm id="FB1_16_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB1_16_4"><signal id="WR"/></pterm><pterm id="FB1_17_1"><signal id="CSA2"/><signal id="CSA1" negated="ON"/><signal id="CS_U"/><signal id="MR_22_SPECSIG" negated="ON"/></pterm><pterm id="FB1_17_2"><signal id="CSA2" negated="ON"/><signal id="CSA1"/><signal id="CS_U"/><signal id="MR_21_SPECSIG" negated="ON"/></pterm><pterm id="FB1_17_3"><signal id="CSA2" negated="ON"/><signal id="CSA1" negated="ON"/><signal id="CS_U"/><signal id="MR_20_SPECSIG" negated="ON"/></pterm><pterm id="FB1_18_1"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG"/><signal id="M2SG_OBUFFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB1_18_2"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="M2SG_OBUFFBKLFBK_SPECSIG"/></pterm><pterm id="FB1_18_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB1_18_4"><signal id="WR"/></pterm><equation id="D0_SPECSIG"><d2><eq_pterm ptindx="FB1_1_1"/><eq_pterm ptindx="FB1_1_2"/><eq_pterm ptindx="FB1_1_3"/><eq_pterm ptindx="FB1_1_4"/></d2><oe><eq_pterm ptindx="FB1_1_5"/></oe></equation><equation id="D1_SPECSIG"><d2><eq_pterm ptindx="FB1_2_1"/><eq_pterm ptindx="FB1_2_2"/><eq_pterm ptindx="FB1_2_3"/><eq_pterm ptindx="FB1_2_4"/></d2><oe><eq_pterm ptindx="FB1_2_5"/></oe></equation><equation id="D2_SPECSIG"><d2><eq_pterm ptindx="FB1_3_1"/><eq_pterm ptindx="FB1_3_2"/><eq_pterm ptindx="FB1_3_3"/><eq_pterm ptindx="FB1_3_4"/></d2><oe><eq_pterm ptindx="FB1_3_5"/></oe></equation><equation id="D3_SPECSIG"><d2><eq_pterm ptindx="FB1_4_1"/></d2><oe><eq_pterm ptindx="FB1_4_2"/></oe></equation><equation id="D4_SPECSIG"><d2><eq_pterm ptindx="FB1_5_1"/></d2><oe><eq_pterm ptindx="FB1_5_2"/></oe></equation><equation id="D5_SPECSIG"><d2><eq_pterm ptindx="FB1_6_1"/></d2><oe><eq_pterm ptindx="FB1_6_2"/></oe></equation><equation id="D6_SPECSIG"><d2><eq_pterm ptindx="FB1_7_1"/></d2><oe><eq_pterm ptindx="FB1_7_2"/></oe></equation><equation id="D7_SPECSIG"><d2><eq_pterm ptindx="FB1_8_1"/></d2><oe><eq_pterm ptindx="FB1_8_2"/></oe></equation><equation id="SEN2" regUse="T"><d2><eq_pterm ptindx="FB1_13_1"/><eq_pterm ptindx="FB1_13_2"/></d2><clk><eq_pterm ptindx="FB1_13_4"/></clk><reset><eq_pterm ptindx="FB1_13_3"/></reset><prld ptindx="GND"/></equation><equation id="M2CLR" regUse="T"><d2><eq_pterm ptindx="FB1_16_1"/><eq_pterm ptindx="FB1_16_2"/></d2><clk><eq_pterm ptindx="FB1_16_4"/></clk><reset><eq_pterm ptindx="FB1_16_3"/></reset><prld ptindx="GND"/></equation><equation id="UART0" negated="ON"><d2><eq_pterm ptindx="FB1_17_1"/><eq_pterm ptindx="FB1_17_2"/><eq_pterm ptindx="FB1_17_3"/></d2></equation><equation id="M2SG" regUse="T"><d2><eq_pterm ptindx="FB1_18_1"/><eq_pterm ptindx="FB1_18_2"/></d2><clk><eq_pterm ptindx="FB1_18_4"/></clk><reset><eq_pterm ptindx="FB1_18_3"/></reset><prld ptindx="GND"/></equation></fblock><fblock id="FB2" pinUse="15" inputUse="29"><macrocell id="FB2_MC1" pin="FB2_MC1_PIN87" sigUse="13" signal="M1PS"><pterms pt1="FB2_1_1" pt2="FB2_1_2" pt3="FB2_1_3" pt4="FB2_1_4"/></macrocell><macrocell id="FB2_MC2" pin="FB2_MC2_PIN94" sigUse="13" signal="SPDA1"><pterms pt1="FB2_2_1" pt2="FB2_2_2" pt3="FB2_2_3" pt4="FB2_2_4"/></macrocell><macrocell id="FB2_MC3" pin="FB2_MC3_PIN91" sigUse="13" signal="M1SG"><pterms pt1="FB2_3_1" pt2="FB2_3_2" pt3="FB2_3_3" pt4="FB2_3_4"/></macrocell><macrocell id="FB2_MC4" pin="FB2_MC4_PIN93" sigUse="13" signal="M1CLR"><pterms pt1="FB2_4_1" pt2="FB2_4_2" pt3="FB2_4_3" pt4="FB2_4_4"/></macrocell><macrocell id="FB2_MC5" pin="FB2_MC5_PIN95" sigUse="13" signal="SEN1"><pterms pt1="FB2_5_1" pt2="FB2_5_2" pt3="FB2_5_3" pt4="FB2_5_4"/></macrocell><macrocell id="FB2_MC6" pin="FB2_MC6_PIN96" sigUse="13" signal="PC1ON"><pterms pt1="FB2_6_1" pt2="FB2_6_2" pt3="FB2_6_3" pt4="FB2_6_4"/></macrocell><macrocell id="FB2_MC7" pin="FB2_MC7_PIN3"/><macrocell id="FB2_MC8" pin="FB2_MC8_PIN97" sigUse="4" signal="CS1"><pterms pt1="FB2_8_1"/></macrocell><macrocell id="FB2_MC9" pin="FB2_MC9_PIN99"/><macrocell id="FB2_MC10" pin="FB2_MC10_PIN1" sigUse="13" signal="CS_U"><pterms pt1="FB2_10_1" pt2="FB2_10_2" pt3="FB2_10_3" pt4="FB2_10_4"/></macrocell><macrocell id="FB2_MC11" pin="FB2_MC11_PIN4" sigUse="13" signal="CSA2"><pterms pt1="FB2_11_1" pt2="FB2_11_2" pt3="FB2_11_3" pt4="FB2_11_4"/></macrocell><macrocell id="FB2_MC12" pin="FB2_MC12_PIN6" sigUse="3" signal="ALMR"><pterms pt1="FB2_12_1"/></macrocell><macrocell id="FB2_MC13" pin="FB2_MC13_PIN8" sigUse="1" signal="CLK"><pterms pt1="FB2_13_1"/></macrocell><macrocell id="FB2_MC14" pin="FB2_MC14_PIN9" sigUse="13" signal="CSA1"><pterms pt1="FB2_14_1" pt2="FB2_14_2" pt3="FB2_14_3" pt4="FB2_14_4"/></macrocell><macrocell id="FB2_MC15" pin="FB2_MC15_PIN11" sigUse="1" signal="INT0"><pterms pt1="FB2_15_1"/></macrocell><macrocell id="FB2_MC16" pin="FB2_MC16_PIN10" sigUse="13" signal="CLR1"><pterms pt1="FB2_16_1" pt2="FB2_16_2" pt3="FB2_16_3" pt4="FB2_16_4"/></macrocell><macrocell id="FB2_MC17" pin="FB2_MC17_PIN12" sigUse="13" signal="CLR0"><pterms pt1="FB2_17_1" pt2="FB2_17_2" pt3="FB2_17_3" pt4="FB2_17_4"/></macrocell><macrocell id="FB2_MC18" pin="FB2_MC18_PIN92" sigUse="13" signal="REL0"><pterms pt1="FB2_18_1" pt2="FB2_18_2" pt3="FB2_18_3" pt4="FB2_18_4"/></macrocell><fbinput id="FB2_I1" signal="A0"/><fbinput id="FB2_I2" signal="A1"/><fbinput id="FB2_I3" signal="A2"/><fbinput id="FB2_I4" signal="CLK8"/><fbinput id="FB2_I5" fbk="LFBK" signal="CLR0FBKLFBK_SPECSIG"/><fbinput id="FB2_I6" fbk="LFBK" signal="CLR1FBKLFBK_SPECSIG"/><fbinput id="FB2_I7" fbk="LFBK" signal="CSA1FBKLFBK_SPECSIG"/><fbinput id="FB2_I8" fbk="LFBK" signal="CSA2FBKLFBK_SPECSIG"/><fbinput id="FB2_I9" signal="CS"/><fbinput id="FB2_I10" fbk="LFBK" signal="CS_UFBKLFBK_SPECSIG"/><fbinput id="FB2_I11" signal="INT_L0"/><fbinput id="FB2_I12" fbk="LFBK" signal="M1CLR_OBUFFBKLFBK_SPECSIG"/><fbinput id="FB2_I13" fbk="LFBK" signal="M1PS_OBUFFBKLFBK_SPECSIG"/><fbinput id="FB2_I14" fbk="LFBK" signal="M1SG_OBUFFBKLFBK_SPECSIG"/><fbinput id="FB2_I15" signal="MR_10_SPECSIG"/><fbinput id="FB2_I16" signal="MR_11_SPECSIG"/><fbinput id="FB2_I17" signal="MR_12_SPECSIG"/><fbinput id="FB2_I18" fbk="PIN" signal="D0PIN_SPECSIG"/><fbinput id="FB2_I19" fbk="PIN" signal="D1PIN_SPECSIG"/><fbinput id="FB2_I20" fbk="PIN" signal="D2PIN_SPECSIG"/><fbinput id="FB2_I21" fbk="PIN" signal="D3PIN_SPECSIG"/><fbinput id="FB2_I22" fbk="PIN" signal="D4PIN_SPECSIG"/><fbinput id="FB2_I23" fbk="PIN" signal="D7PIN_SPECSIG"/><fbinput id="FB2_I24" fbk="LFBK" signal="PC1ON_OBUFFBKLFBK_SPECSIG"/><fbinput id="FB2_I25" fbk="LFBK" signal="REL0_OBUFFBKLFBK_SPECSIG"/><fbinput id="FB2_I26" signal="RESET"/><fbinput id="FB2_I27" fbk="LFBK" signal="SEN1_OBUFFBKLFBK_SPECSIG"/><fbinput id="FB2_I28" fbk="LFBK" signal="SPDA1_OBUFFBKLFBK_SPECSIG"/><fbinput id="FB2_I29" signal="WR"/><pterm id="FB2_1_1"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG"/><signal id="M1PS_OBUFFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB2_1_2"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="M1PS_OBUFFBKLFBK_SPECSIG"/></pterm><pterm id="FB2_1_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB2_1_4"><signal id="WR"/></pterm><pterm id="FB2_2_1"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG"/><signal id="D2PIN_SPECSIG"/><signal id="D7PIN_SPECSIG"/><signal id="SPDA1_OBUFFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB2_2_2"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG"/><signal id="D2PIN_SPECSIG"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="SPDA1_OBUFFBKLFBK_SPECSIG"/></pterm><pterm id="FB2_2_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB2_2_4"><signal id="WR"/></pterm><pterm id="FB2_3_1"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG"/><signal id="M1SG_OBUFFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB2_3_2"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="M1SG_OBUFFBKLFBK_SPECSIG"/></pterm><pterm id="FB2_3_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB2_3_4"><signal id="WR"/></pterm><pterm id="FB2_4_1"><signal id="D1PIN_SPECSIG"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG"/><signal id="M1CLR_OBUFFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB2_4_2"><signal id="D1PIN_SPECSIG"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="M1CLR_OBUFFBKLFBK_SPECSIG"/></pterm><pterm id="FB2_4_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB2_4_4"><signal id="WR"/></pterm><pterm id="FB2_5_1"><signal id="D1PIN_SPECSIG"/><signal id="D0PIN_SPECSIG"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG"/><signal id="SEN1_OBUFFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB2_5_2"><signal id="D1PIN_SPECSIG"/><signal id="D0PIN_SPECSIG"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="SEN1_OBUFFBKLFBK_SPECSIG"/></pterm><pterm id="FB2_5_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB2_5_4"><signal id="WR"/></pterm><pterm id="FB2_6_1"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG"/><signal id="D2PIN_SPECSIG"/><signal id="D7PIN_SPECSIG"/><signal id="PC1ON_OBUFFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB2_6_2"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG"/><signal id="D2PIN_SPECSIG"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="PC1ON_OBUFFBKLFBK_SPECSIG"/></pterm><pterm id="FB2_6_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB2_6_4"><signal id="WR"/></pterm><pterm id="FB2_8_1"><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1" negated="ON"/><signal id="A0" negated="ON"/></pterm><pterm id="FB2_10_1"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG"/><signal id="D7PIN_SPECSIG"/><signal id="CS_UFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB2_10_2"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="CS_UFBKLFBK_SPECSIG"/></pterm><pterm id="FB2_10_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB2_10_4"><signal id="WR"/></pterm><pterm id="FB2_11_1"><signal id="D1PIN_SPECSIG"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG"/><signal id="CSA2FBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB2_11_2"><signal id="D1PIN_SPECSIG"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="CSA2FBKLFBK_SPECSIG"/></pterm><pterm id="FB2_11_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB2_11_4"><signal id="WR"/></pterm><pterm id="FB2_12_1"><signal id="MR_12_SPECSIG" negated="ON"/><signal id="MR_11_SPECSIG" negated="ON"/><signal id="MR_10_SPECSIG" negated="ON"/></pterm><pterm id="FB2_13_1"><signal id="CLK8"/></pterm><pterm id="FB2_14_1"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG"/><signal id="CSA1FBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB2_14_2"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="CSA1FBKLFBK_SPECSIG"/></pterm><pterm id="FB2_14_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB2_14_4"><signal id="WR"/></pterm><pterm id="FB2_15_1"><signal id="INT_L0"/></pterm><pterm id="FB2_16_1"><signal id="D1PIN_SPECSIG"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG"/><signal id="D7PIN_SPECSIG"/><signal id="CLR1FBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB2_16_2"><signal id="D1PIN_SPECSIG"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="CLR1FBKLFBK_SPECSIG"/></pterm><pterm id="FB2_16_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB2_16_4"><signal id="WR"/></pterm><pterm id="FB2_17_1"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG"/><signal id="D7PIN_SPECSIG"/><signal id="CLR0FBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB2_17_2"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="CLR0FBKLFBK_SPECSIG"/></pterm><pterm id="FB2_17_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB2_17_4"><signal id="WR"/></pterm><pterm id="FB2_18_1"><signal id="D1PIN_SPECSIG"/><signal id="D0PIN_SPECSIG"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG"/><signal id="REL0_OBUFFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB2_18_2"><signal id="D1PIN_SPECSIG"/><signal id="D0PIN_SPECSIG"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="REL0_OBUFFBKLFBK_SPECSIG"/></pterm><pterm id="FB2_18_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB2_18_4"><signal id="WR"/></pterm><equation id="M1PS" regUse="T"><d2><eq_pterm ptindx="FB2_1_1"/><eq_pterm ptindx="FB2_1_2"/></d2><clk><eq_pterm ptindx="FB2_1_4"/></clk><reset><eq_pterm ptindx="FB2_1_3"/></reset><prld ptindx="GND"/></equation><equation id="SPDA1" regUse="T"><d2><eq_pterm ptindx="FB2_2_1"/><eq_pterm ptindx="FB2_2_2"/></d2><clk><eq_pterm ptindx="FB2_2_4"/></clk><reset><eq_pterm ptindx="FB2_2_3"/></reset><prld ptindx="GND"/></equation><equation id="M1SG" regUse="T"><d2><eq_pterm ptindx="FB2_3_1"/><eq_pterm ptindx="FB2_3_2"/></d2><clk><eq_pterm ptindx="FB2_3_4"/></clk><reset><eq_pterm ptindx="FB2_3_3"/></reset><prld ptindx="GND"/></equation><equation id="M1CLR" regUse="T"><d2><eq_pterm ptindx="FB2_4_1"/><eq_pterm ptindx="FB2_4_2"/></d2><clk><eq_pterm ptindx="FB2_4_4"/></clk><reset><eq_pterm ptindx="FB2_4_3"/></reset><prld ptindx="GND"/></equation><equation id="SEN1" regUse="T"><d2><eq_pterm ptindx="FB2_5_1"/><eq_pterm ptindx="FB2_5_2"/></d2><clk><eq_pterm ptindx="FB2_5_4"/></clk><reset><eq_pterm ptindx="FB2_5_3"/></reset><prld ptindx="GND"/></equation><equation id="PC1ON" regUse="T"><d2><eq_pterm ptindx="FB2_6_1"/><eq_pterm ptindx="FB2_6_2"/></d2><clk><eq_pterm ptindx="FB2_6_4"/></clk><reset><eq_pterm ptindx="FB2_6_3"/></reset><prld ptindx="GND"/></equation><equation id="CS1" negated="ON"><d2><eq_pterm ptindx="FB2_8_1"/></d2></equation><equation id="CS_U" regUse="T"><d2><eq_pterm ptindx="FB2_10_1"/><eq_pterm ptindx="FB2_10_2"/></d2><clk><eq_pterm ptindx="FB2_10_4"/></clk><reset><eq_pterm ptindx="FB2_10_3"/></reset><prld ptindx="GND"/></equation><equation id="CSA2" regUse="T"><d2><eq_pterm ptindx="FB2_11_1"/><eq_pterm ptindx="FB2_11_2"/></d2><clk><eq_pterm ptindx="FB2_11_4"/></clk><reset><eq_pterm ptindx="FB2_11_3"/></reset><prld ptindx="GND"/></equation><equation id="ALMR" negated="ON"><d2><eq_pterm ptindx="FB2_12_1"/></d2></equation><equation id="CLK"><d2><eq_pterm ptindx="FB2_13_1"/></d2></equation><equation id="CSA1" regUse="T"><d2><eq_pterm ptindx="FB2_14_1"/><eq_pterm ptindx="FB2_14_2"/></d2><clk><eq_pterm ptindx="FB2_14_4"/></clk><reset><eq_pterm ptindx="FB2_14_3"/></reset><prld ptindx="GND"/></equation><equation id="INT0"><d2><eq_pterm ptindx="FB2_15_1"/></d2></equation><equation id="CLR1" regUse="T"><d2><eq_pterm ptindx="FB2_16_1"/><eq_pterm ptindx="FB2_16_2"/></d2><clk><eq_pterm ptindx="FB2_16_4"/></clk><reset><eq_pterm ptindx="FB2_16_3"/></reset><prld ptindx="GND"/></equation><equation id="CLR0" regUse="T"><d2><eq_pterm ptindx="FB2_17_1"/><eq_pterm ptindx="FB2_17_2"/></d2><clk><eq_pterm ptindx="FB2_17_4"/></clk><reset><eq_pterm ptindx="FB2_17_3"/></reset><prld ptindx="GND"/></equation><equation id="REL0" regUse="T"><d2><eq_pterm ptindx="FB2_18_1"/><eq_pterm ptindx="FB2_18_2"/></d2><clk><eq_pterm ptindx="FB2_18_4"/></clk><reset><eq_pterm ptindx="FB2_18_3"/></reset><prld ptindx="GND"/></equation></fblock><fblock id="FB3" pinUse="18" inputUse="36"><macrocell id="FB3_MC1" pin="FB3_MC1_PIN41"/><macrocell id="FB3_MC2" pin="FB3_MC2_PIN32" sigUse="3" signal="XLXI_57Q412XLXI_57Q41<2>_CLKF__INT_SPECSIG"><pterms pt1="FB3_2_1"/></macrocell><macrocell id="FB3_MC3" pin="FB3_MC3_PIN49" sigUse="2" signal="XLXN_87_SPECSIG"><pterms pt1="FB3_3_1" pt2="FB3_3_2"/></macrocell><macrocell id="FB3_MC4" pin="FB3_MC4_PIN50" sigUse="2" signal="XLXN_86_SPECSIG"><pterms pt1="FB3_4_1" pt2="FB3_4_2"/></macrocell><macrocell id="FB3_MC5" pin="FB3_MC5_PIN35" sigUse="2" signal="XLXN_85_SPECSIG"><pterms pt1="FB3_5_1" pt2="FB3_5_2"/></macrocell><macrocell id="FB3_MC6" pin="FB3_MC6_PIN53" sigUse="2" signal="XLXN_84_SPECSIG"><pterms pt1="FB3_6_1" pt2="FB3_6_2"/></macrocell><macrocell id="FB3_MC7" pin="FB3_MC7_PIN54" sigUse="2" signal="XLXN_81_SPECSIG"><pterms pt1="FB3_7_1" pt2="FB3_7_2"/></macrocell><macrocell id="FB3_MC8" pin="FB3_MC8_PIN37" sigUse="2" signal="XLXN_80_SPECSIG"><pterms pt1="FB3_8_1" pt2="FB3_8_2"/></macrocell><macrocell id="FB3_MC9" pin="FB3_MC9_PIN42" sigUse="13" signal="SPDB2"><pterms pt1="FB3_9_1" pt2="FB3_9_2" pt3="FB3_9_3" pt4="FB3_9_4"/></macrocell><macrocell id="FB3_MC10" pin="FB3_MC10_PIN60" sigUse="13" signal="SPD2A"><pterms pt1="FB3_10_1" pt2="FB3_10_2" pt3="FB3_10_3" pt4="FB3_10_4"/></macrocell><macrocell id="FB3_MC11" pin="FB3_MC11_PIN52" sigUse="5" signal="XLXI_57Q413_SPECSIG"><pterms pt1="FB3_11_1" pt2="FB3_11_2" pt3="FB3_11_3" pt4="FB3_11_4"/></macrocell><macrocell id="FB3_MC12" pin="FB3_MC12_PIN61" sigUse="6" signal="XLXI_57Q412_SPECSIG"><pterms pt1="FB3_12_1" pt2="FB3_12_2" pt3="FB3_12_3" pt4="FB3_12_4"/></macrocell><macrocell id="FB3_MC13" pin="FB3_MC13_PIN63" sigUse="5" signal="XLXI_57Q411_SPECSIG"><pterms pt1="FB3_13_1" pt2="FB3_13_2" pt3="FB3_13_3" pt4="FB3_13_4"/></macrocell><macrocell id="FB3_MC14" pin="FB3_MC14_PIN55" sigUse="4" signal="XLXI_57Q410_SPECSIG"><pterms pt1="FB3_14_1" pt2="FB3_14_2" pt3="FB3_14_3" pt4="FB3_14_4"/></macrocell><macrocell id="FB3_MC15" pin="FB3_MC15_PIN56" sigUse="6" signal="D7_BUFR_SPECSIG"><pterms pt1="FB3_15_1" pt2="FB3_15_2" pt3="FB3_15_3" pt4="FB3_15_4"/></macrocell><macrocell id="FB3_MC16" pin="FB3_MC16_PIN65" sigUse="6" signal="D5_BUFR_SPECSIG"><pterms pt1="FB3_16_1" pt2="FB3_16_2" pt3="FB3_16_3" pt4="FB3_16_4"/></macrocell><macrocell id="FB3_MC17" pin="FB3_MC17_PIN58" sigUse="13" signal="M2PS"><pterms pt1="FB3_17_1" pt2="FB3_17_2" pt3="FB3_17_3" pt4="FB3_17_4"/></macrocell><macrocell id="FB3_MC18" pin="FB3_MC18_PIN59" sigUse="13" signal="SPDB1"><pterms pt1="FB3_18_1" pt2="FB3_18_2" pt3="FB3_18_3" pt4="FB3_18_4"/></macrocell><fbinput id="FB3_I1" signal="A0"/><fbinput id="FB3_I2" signal="A1"/><fbinput id="FB3_I3" signal="A2"/><fbinput id="FB3_I4" signal="CLR1"/><fbinput id="FB3_I5" signal="CS"/><fbinput id="FB3_I6" fbk="LFBK" signal="M2PS_OBUFFBKLFBK_SPECSIG"/><fbinput id="FB3_I7" signal="MA1"/><fbinput id="FB3_I8" signal="MB1"/><fbinput id="FB3_I9" signal="MC1"/><fbinput id="FB3_I10" signal="MR_05_SPECSIG"/><fbinput id="FB3_I11" signal="MR_07_SPECSIG"/><fbinput id="FB3_I12" signal="MR_15_SPECSIG"/><fbinput id="FB3_I13" signal="MR_17_SPECSIG"/><fbinput id="FB3_I14" signal="MR_25_SPECSIG"/><fbinput id="FB3_I15" signal="MR_27_SPECSIG"/><fbinput id="FB3_I16" fbk="PIN" signal="D0PIN_SPECSIG"/><fbinput id="FB3_I17" fbk="PIN" signal="D1PIN_SPECSIG"/><fbinput id="FB3_I18" fbk="PIN" signal="D2PIN_SPECSIG"/><fbinput id="FB3_I19" fbk="PIN" signal="D3PIN_SPECSIG"/><fbinput id="FB3_I20" fbk="PIN" signal="D4PIN_SPECSIG"/><fbinput id="FB3_I21" fbk="PIN" signal="D7PIN_SPECSIG"/><fbinput id="FB3_I22" signal="RD"/><fbinput id="FB3_I23" signal="RESET"/><fbinput id="FB3_I24" fbk="LFBK" signal="SPD2A_OBUFFBKLFBK_SPECSIG"/><fbinput id="FB3_I25" fbk="LFBK" signal="SPDB1_OBUFFBKLFBK_SPECSIG"/><fbinput id="FB3_I26" fbk="LFBK" signal="SPDB2_OBUFFBKLFBK_SPECSIG"/><fbinput id="FB3_I27" signal="WR"/><fbinput id="FB3_I28" fbk="LFBK" signal="XLXI_57Q410FBKLFBK_SPECSIG"/><fbinput id="FB3_I29" fbk="LFBK" signal="XLXI_57Q411FBKLFBK_SPECSIG"/><fbinput id="FB3_I30" fbk="LFBK" signal="XLXI_57Q412FBKLFBK_SPECSIG"/><fbinput id="FB3_I31" fbk="LFBK" signal="XLXI_57Q412XLXI_57Q41<2>_CLKF__INTFBKLFBK_SPECSIG"/><fbinput id="FB3_I32" fbk="LFBK" signal="XLXI_57Q413FBKLFBK_SPECSIG"/><fbinput id="FB3_I33" signal="XLXI_57Q40_SPECSIG"/><fbinput id="FB3_I34" signal="XLXI_57Q41_SPECSIG"/><fbinput id="FB3_I35" fbk="LFBK" signal="XLXN_85FBKLFBK_SPECSIG"/><fbinput id="FB3_I36" fbk="LFBK" signal="XLXN_87FBKLFBK_SPECSIG"/><pterm id="FB3_2_1"><signal id="MA1"/><signal id="MB1"/><signal id="MC1" negated="ON"/></pterm><pterm id="FB3_3_1"><signal id="RD" negated="ON"/><signal id="XLXI_57Q413FBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB3_3_2"><signal id="RD" negated="ON"/><signal id="XLXI_57Q413FBKLFBK_SPECSIG"/></pterm><pterm id="FB3_4_1"><signal id="RD" negated="ON"/><signal id="XLXI_57Q412FBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB3_4_2"><signal id="RD" negated="ON"/><signal id="XLXI_57Q412FBKLFBK_SPECSIG"/></pterm><pterm id="FB3_5_1"><signal id="RD" negated="ON"/><signal id="XLXI_57Q411FBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB3_5_2"><signal id="RD" negated="ON"/><signal id="XLXI_57Q411FBKLFBK_SPECSIG"/></pterm><pterm id="FB3_6_1"><signal id="RD" negated="ON"/><signal id="XLXI_57Q410FBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB3_6_2"><signal id="RD" negated="ON"/><signal id="XLXI_57Q410FBKLFBK_SPECSIG"/></pterm><pterm id="FB3_7_1"><signal id="XLXI_57Q41_SPECSIG" negated="ON"/><signal id="RD" negated="ON"/></pterm><pterm id="FB3_7_2"><signal id="XLXI_57Q41_SPECSIG"/><signal id="RD" negated="ON"/></pterm><pterm id="FB3_8_1"><signal id="XLXI_57Q40_SPECSIG" negated="ON"/><signal id="RD" negated="ON"/></pterm><pterm id="FB3_8_2"><signal id="XLXI_57Q40_SPECSIG"/><signal id="RD" negated="ON"/></pterm><pterm id="FB3_9_1"><signal id="D1PIN_SPECSIG"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG"/><signal id="D7PIN_SPECSIG"/><signal id="SPDB2_OBUFFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB3_9_2"><signal id="D1PIN_SPECSIG"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="SPDB2_OBUFFBKLFBK_SPECSIG"/></pterm><pterm id="FB3_9_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB3_9_4"><signal id="WR"/></pterm><pterm id="FB3_10_1"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG"/><signal id="D7PIN_SPECSIG"/><signal id="SPD2A_OBUFFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB3_10_2"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="SPD2A_OBUFFBKLFBK_SPECSIG"/></pterm><pterm id="FB3_10_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB3_10_4"><signal id="WR"/></pterm><pterm id="FB3_11_1"><signal id="MA1"/><signal id="MB1" negated="ON"/><signal id="XLXI_57Q413FBKLFBK_SPECSIG"/></pterm><pterm id="FB3_11_2"><signal id="MA1" negated="ON"/><signal id="MB1"/><signal id="XLXI_57Q413FBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB3_11_3"><signal id="CLR1"/></pterm><pterm id="FB3_11_4"><signal id="XLXI_57Q412XLXI_57Q41<2>_CLKF__INTFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB3_12_1"><signal id="MA1"/><signal id="MB1" negated="ON"/><signal id="XLXI_57Q410FBKLFBK_SPECSIG"/><signal id="XLXI_57Q411FBKLFBK_SPECSIG"/></pterm><pterm id="FB3_12_2"><signal id="MA1" negated="ON"/><signal id="MB1"/><signal id="XLXI_57Q410FBKLFBK_SPECSIG" negated="ON"/><signal id="XLXI_57Q411FBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB3_12_3"><signal id="CLR1"/></pterm><pterm id="FB3_12_4"><signal id="XLXI_57Q412XLXI_57Q41<2>_CLKF__INTFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB3_13_1"><signal id="MA1"/><signal id="MB1" negated="ON"/><signal id="XLXI_57Q410FBKLFBK_SPECSIG"/></pterm><pterm id="FB3_13_2"><signal id="MA1" negated="ON"/><signal id="MB1"/><signal id="XLXI_57Q410FBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB3_13_3"><signal id="CLR1"/></pterm><pterm id="FB3_13_4"><signal id="XLXI_57Q412XLXI_57Q41<2>_CLKF__INTFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB3_14_1"><signal id="MA1"/><signal id="MB1" negated="ON"/></pterm><pterm id="FB3_14_2"><signal id="MA1" negated="ON"/><signal id="MB1"/></pterm><pterm id="FB3_14_3"><signal id="CLR1"/></pterm><pterm id="FB3_14_4"><signal id="XLXI_57Q412XLXI_57Q41<2>_CLKF__INTFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB3_15_1"><signal id="A1"/><signal id="A0"/><signal id="XLXN_87FBKLFBK_SPECSIG"/></pterm><pterm id="FB3_15_2"><signal id="A1"/><signal id="A0" negated="ON"/><signal id="MR_27_SPECSIG"/></pterm><pterm id="FB3_15_3"><signal id="A1" negated="ON"/><signal id="A0"/><signal id="MR_17_SPECSIG"/></pterm><pterm id="FB3_15_4"><signal id="A1" negated="ON"/><signal id="A0" negated="ON"/><signal id="MR_07_SPECSIG"/></pterm><pterm id="FB3_16_1"><signal id="A1"/><signal id="A0"/><signal id="XLXN_85FBKLFBK_SPECSIG"/></pterm><pterm id="FB3_16_2"><signal id="A1"/><signal id="A0" negated="ON"/><signal id="MR_25_SPECSIG"/></pterm><pterm id="FB3_16_3"><signal id="A1" negated="ON"/><signal id="A0"/><signal id="MR_15_SPECSIG"/></pterm><pterm id="FB3_16_4"><signal id="A1" negated="ON"/><signal id="A0" negated="ON"/><signal id="MR_05_SPECSIG"/></pterm><pterm id="FB3_17_1"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG"/><signal id="M2PS_OBUFFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB3_17_2"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="M2PS_OBUFFBKLFBK_SPECSIG"/></pterm><pterm id="FB3_17_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB3_17_4"><signal id="WR"/></pterm><pterm id="FB3_18_1"><signal id="D1PIN_SPECSIG"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG"/><signal id="D2PIN_SPECSIG"/><signal id="D7PIN_SPECSIG"/><signal id="SPDB1_OBUFFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB3_18_2"><signal id="D1PIN_SPECSIG"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG"/><signal id="D2PIN_SPECSIG"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="SPDB1_OBUFFBKLFBK_SPECSIG"/></pterm><pterm id="FB3_18_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB3_18_4"><signal id="WR"/></pterm><equation id="XLXI_57Q412XLXI_57Q41<2>_CLKF__INT_SPECSIG"><d2><eq_pterm ptindx="FB3_2_1"/></d2></equation><equation id="XLXN_87_SPECSIG" regUse="D"><d2><eq_pterm ptindx="GND"/></d2><clk><eq_pterm ptindx="GND"/></clk><set><eq_pterm ptindx="FB3_3_2"/></set><reset><eq_pterm ptindx="FB3_3_1"/></reset><prld ptindx="GND"/></equation><equation id="XLXN_86_SPECSIG" regUse="D"><d2><eq_pterm ptindx="GND"/></d2><clk><eq_pterm ptindx="GND"/></clk><set><eq_pterm ptindx="FB3_4_2"/></set><reset><eq_pterm ptindx="FB3_4_1"/></reset><prld ptindx="GND"/></equation><equation id="XLXN_85_SPECSIG" regUse="D"><d2><eq_pterm ptindx="GND"/></d2><clk><eq_pterm ptindx="GND"/></clk><set><eq_pterm ptindx="FB3_5_2"/></set><reset><eq_pterm ptindx="FB3_5_1"/></reset><prld ptindx="GND"/></equation><equation id="XLXN_84_SPECSIG" regUse="D"><d2><eq_pterm ptindx="GND"/></d2><clk><eq_pterm ptindx="GND"/></clk><set><eq_pterm ptindx="FB3_6_2"/></set><reset><eq_pterm ptindx="FB3_6_1"/></reset><prld ptindx="GND"/></equation><equation id="XLXN_81_SPECSIG" regUse="D"><d2><eq_pterm ptindx="GND"/></d2><clk><eq_pterm ptindx="GND"/></clk><set><eq_pterm ptindx="FB3_7_2"/></set><reset><eq_pterm ptindx="FB3_7_1"/></reset><prld ptindx="GND"/></equation><equation id="XLXN_80_SPECSIG" regUse="D"><d2><eq_pterm ptindx="GND"/></d2><clk><eq_pterm ptindx="GND"/></clk><set><eq_pterm ptindx="FB3_8_2"/></set><reset><eq_pterm ptindx="FB3_8_1"/></reset><prld ptindx="GND"/></equation><equation id="SPDB2" regUse="T"><d2><eq_pterm ptindx="FB3_9_1"/><eq_pterm ptindx="FB3_9_2"/></d2><clk><eq_pterm ptindx="FB3_9_4"/></clk><reset><eq_pterm ptindx="FB3_9_3"/></reset><prld ptindx="GND"/></equation><equation id="SPD2A" regUse="T"><d2><eq_pterm ptindx="FB3_10_1"/><eq_pterm ptindx="FB3_10_2"/></d2><clk><eq_pterm ptindx="FB3_10_4"/></clk><reset><eq_pterm ptindx="FB3_10_3"/></reset><prld ptindx="GND"/></equation><equation id="XLXI_57Q413_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB3_11_1"/><eq_pterm ptindx="FB3_11_2"/></d2><clk><eq_pterm ptindx="FB3_11_4"/></clk><reset><eq_pterm ptindx="FB3_11_3"/></reset><prld ptindx="GND"/></equation><equation id="XLXI_57Q412_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB3_12_1"/><eq_pterm ptindx="FB3_12_2"/></d2><clk><eq_pterm ptindx="FB3_12_4"/></clk><reset><eq_pterm ptindx="FB3_12_3"/></reset><prld ptindx="GND"/></equation><equation id="XLXI_57Q411_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB3_13_1"/><eq_pterm ptindx="FB3_13_2"/></d2><clk><eq_pterm ptindx="FB3_13_4"/></clk><reset><eq_pterm ptindx="FB3_13_3"/></reset><prld ptindx="GND"/></equation><equation id="XLXI_57Q410_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB3_14_1"/><eq_pterm ptindx="FB3_14_2"/></d2><clk><eq_pterm ptindx="FB3_14_4"/></clk><reset><eq_pterm ptindx="FB3_14_3"/></reset><prld ptindx="GND"/></equation><equation id="D7_BUFR_SPECSIG"><d2><eq_pterm ptindx="FB3_15_1"/><eq_pterm ptindx="FB3_15_2"/><eq_pterm ptindx="FB3_15_3"/><eq_pterm ptindx="FB3_15_4"/></d2></equation><equation id="D5_BUFR_SPECSIG"><d2><eq_pterm ptindx="FB3_16_1"/><eq_pterm ptindx="FB3_16_2"/><eq_pterm ptindx="FB3_16_3"/><eq_pterm ptindx="FB3_16_4"/></d2></equation><equation id="M2PS" regUse="T"><d2><eq_pterm ptindx="FB3_17_1"/><eq_pterm ptindx="FB3_17_2"/></d2><clk><eq_pterm ptindx="FB3_17_4"/></clk><reset><eq_pterm ptindx="FB3_17_3"/></reset><prld ptindx="GND"/></equation><equation id="SPDB1" regUse="T"><d2><eq_pterm ptindx="FB3_18_1"/><eq_pterm ptindx="FB3_18_2"/></d2><clk><eq_pterm ptindx="FB3_18_4"/></clk><reset><eq_pterm ptindx="FB3_18_3"/></reset><prld ptindx="GND"/></equation></fblock><fblock id="FB4" pinUse="18" inputUse="36"><macrocell id="FB4_MC1" pin="FB4_MC1_PIN66"/><macrocell id="FB4_MC2" pin="FB4_MC2_PIN64"/><macrocell id="FB4_MC3" pin="FB4_MC3_PIN71"/><macrocell id="FB4_MC4" pin="FB4_MC4_PIN72"/><macrocell id="FB4_MC5" pin="FB4_MC5_PIN67"/><macrocell id="FB4_MC6" pin="FB4_MC6_PIN76"/><macrocell id="FB4_MC7" pin="FB4_MC7_PIN77" sigUse="3" signal="XLXI_57Q42XLXI_57Q4<2>_CLKF__INT_SPECSIG"><pterms pt1="FB4_7_1"/></macrocell><macrocell id="FB4_MC8" pin="FB4_MC8_PIN68" sigUse="2" signal="XLXN_83_SPECSIG"><pterms pt1="FB4_8_1" pt2="FB4_8_2"/></macrocell><macrocell id="FB4_MC9" pin="FB4_MC9_PIN70" sigUse="2" signal="XLXN_82_SPECSIG"><pterms pt1="FB4_9_1" pt2="FB4_9_2"/></macrocell><macrocell id="FB4_MC10" pin="FB4_MC10_PIN81" sigUse="5" signal="XLXI_57Q43_SPECSIG"><pterms pt1="FB4_10_1" pt2="FB4_10_2" pt3="FB4_10_3" pt4="FB4_10_4"/></macrocell><macrocell id="FB4_MC11" pin="FB4_MC11_PIN74" sigUse="6" signal="XLXI_57Q42_SPECSIG"><pterms pt1="FB4_11_1" pt2="FB4_11_2" pt3="FB4_11_3" pt4="FB4_11_4"/></macrocell><macrocell id="FB4_MC12" pin="FB4_MC12_PIN82" sigUse="5" signal="XLXI_57Q41_SPECSIG"><pterms pt1="FB4_12_1" pt2="FB4_12_2" pt3="FB4_12_3" pt4="FB4_12_4"/></macrocell><macrocell id="FB4_MC13" pin="FB4_MC13_PIN85" sigUse="4" signal="XLXI_57Q40_SPECSIG"><pterms pt1="FB4_13_1" pt2="FB4_13_2" pt3="FB4_13_3" pt4="FB4_13_4"/></macrocell><macrocell id="FB4_MC14" pin="FB4_MC14_PIN78" sigUse="6" signal="D6_BUFR_SPECSIG"><pterms pt1="FB4_14_1" pt2="FB4_14_2" pt3="FB4_14_3" pt4="FB4_14_4"/></macrocell><macrocell id="FB4_MC15" pin="FB4_MC15_PIN89" sigUse="6" signal="D4_BUFR_SPECSIG"><pterms pt1="FB4_15_1" pt2="FB4_15_2" pt3="FB4_15_3" pt4="FB4_15_4"/></macrocell><macrocell id="FB4_MC16" pin="FB4_MC16_PIN86" sigUse="6" signal="D3_BUFR_SPECSIG"><pterms pt1="FB4_16_1" pt2="FB4_16_2" pt3="FB4_16_3" pt4="FB4_16_4"/></macrocell><macrocell id="FB4_MC17" pin="FB4_MC17_PIN90" sigUse="13" signal="SEN0"><pterms pt1="FB4_17_1" pt2="FB4_17_2" pt3="FB4_17_3" pt4="FB4_17_4"/></macrocell><macrocell id="FB4_MC18" pin="FB4_MC18_PIN79" sigUse="13" signal="PC2ON"><pterms pt1="FB4_18_1" pt2="FB4_18_2" pt3="FB4_18_3" pt4="FB4_18_4"/></macrocell><fbinput id="FB4_I1" signal="A0"/><fbinput id="FB4_I2" signal="A1"/><fbinput id="FB4_I3" signal="A2"/><fbinput id="FB4_I4" signal="CLR0"/><fbinput id="FB4_I5" signal="CS"/><fbinput id="FB4_I6" signal="MA0"/><fbinput id="FB4_I7" signal="MB0"/><fbinput id="FB4_I8" signal="MC0"/><fbinput id="FB4_I9" signal="MR_03_SPECSIG"/><fbinput id="FB4_I10" signal="MR_04_SPECSIG"/><fbinput id="FB4_I11" signal="MR_06_SPECSIG"/><fbinput id="FB4_I12" signal="MR_13_SPECSIG"/><fbinput id="FB4_I13" signal="MR_14_SPECSIG"/><fbinput id="FB4_I14" signal="MR_16_SPECSIG"/><fbinput id="FB4_I15" signal="MR_23_SPECSIG"/><fbinput id="FB4_I16" signal="MR_24_SPECSIG"/><fbinput id="FB4_I17" signal="MR_26_SPECSIG"/><fbinput id="FB4_I18" fbk="PIN" signal="D0PIN_SPECSIG"/><fbinput id="FB4_I19" fbk="PIN" signal="D1PIN_SPECSIG"/><fbinput id="FB4_I20" fbk="PIN" signal="D2PIN_SPECSIG"/><fbinput id="FB4_I21" fbk="PIN" signal="D3PIN_SPECSIG"/><fbinput id="FB4_I22" fbk="PIN" signal="D4PIN_SPECSIG"/><fbinput id="FB4_I23" fbk="PIN" signal="D7PIN_SPECSIG"/><fbinput id="FB4_I24" fbk="LFBK" signal="PC2ON_OBUFFBKLFBK_SPECSIG"/><fbinput id="FB4_I25" signal="RD"/><fbinput id="FB4_I26" signal="RESET"/><fbinput id="FB4_I27" fbk="LFBK" signal="SEN0_OBUFFBKLFBK_SPECSIG"/><fbinput id="FB4_I28" signal="WR"/><fbinput id="FB4_I29" fbk="LFBK" signal="XLXI_57Q40FBKLFBK_SPECSIG"/><fbinput id="FB4_I30" fbk="LFBK" signal="XLXI_57Q41FBKLFBK_SPECSIG"/><fbinput id="FB4_I31" fbk="LFBK" signal="XLXI_57Q42FBKLFBK_SPECSIG"/><fbinput id="FB4_I32" fbk="LFBK" signal="XLXI_57Q42XLXI_57Q4<2>_CLKF__INTFBKLFBK_SPECSIG"/><fbinput id="FB4_I33" fbk="LFBK" signal="XLXI_57Q43FBKLFBK_SPECSIG"/><fbinput id="FB4_I34" fbk="LFBK" signal="XLXN_83FBKLFBK_SPECSIG"/><fbinput id="FB4_I35" signal="XLXN_84_SPECSIG"/><fbinput id="FB4_I36" signal="XLXN_86_SPECSIG"/><pterm id="FB4_7_1"><signal id="MA0"/><signal id="MB0"/><signal id="MC0" negated="ON"/></pterm><pterm id="FB4_8_1"><signal id="RD" negated="ON"/><signal id="XLXI_57Q43FBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB4_8_2"><signal id="RD" negated="ON"/><signal id="XLXI_57Q43FBKLFBK_SPECSIG"/></pterm><pterm id="FB4_9_1"><signal id="RD" negated="ON"/><signal id="XLXI_57Q42FBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB4_9_2"><signal id="RD" negated="ON"/><signal id="XLXI_57Q42FBKLFBK_SPECSIG"/></pterm><pterm id="FB4_10_1"><signal id="MA0"/><signal id="MB0" negated="ON"/><signal id="XLXI_57Q43FBKLFBK_SPECSIG"/></pterm><pterm id="FB4_10_2"><signal id="MA0" negated="ON"/><signal id="MB0"/><signal id="XLXI_57Q43FBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB4_10_3"><signal id="CLR0"/></pterm><pterm id="FB4_10_4"><signal id="XLXI_57Q42XLXI_57Q4<2>_CLKF__INTFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB4_11_1"><signal id="MA0"/><signal id="MB0" negated="ON"/><signal id="XLXI_57Q40FBKLFBK_SPECSIG"/><signal id="XLXI_57Q41FBKLFBK_SPECSIG"/></pterm><pterm id="FB4_11_2"><signal id="MA0" negated="ON"/><signal id="MB0"/><signal id="XLXI_57Q40FBKLFBK_SPECSIG" negated="ON"/><signal id="XLXI_57Q41FBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB4_11_3"><signal id="CLR0"/></pterm><pterm id="FB4_11_4"><signal id="XLXI_57Q42XLXI_57Q4<2>_CLKF__INTFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB4_12_1"><signal id="MA0"/><signal id="MB0" negated="ON"/><signal id="XLXI_57Q40FBKLFBK_SPECSIG"/></pterm><pterm id="FB4_12_2"><signal id="MA0" negated="ON"/><signal id="MB0"/><signal id="XLXI_57Q40FBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB4_12_3"><signal id="CLR0"/></pterm><pterm id="FB4_12_4"><signal id="XLXI_57Q42XLXI_57Q4<2>_CLKF__INTFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB4_13_1"><signal id="MA0"/><signal id="MB0" negated="ON"/></pterm><pterm id="FB4_13_2"><signal id="MA0" negated="ON"/><signal id="MB0"/></pterm><pterm id="FB4_13_3"><signal id="CLR0"/></pterm><pterm id="FB4_13_4"><signal id="XLXI_57Q42XLXI_57Q4<2>_CLKF__INTFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB4_14_1"><signal id="A1"/><signal id="A0"/><signal id="XLXN_86_SPECSIG"/></pterm><pterm id="FB4_14_2"><signal id="A1"/><signal id="A0" negated="ON"/><signal id="MR_26_SPECSIG"/></pterm><pterm id="FB4_14_3"><signal id="A1" negated="ON"/><signal id="A0"/><signal id="MR_16_SPECSIG"/></pterm><pterm id="FB4_14_4"><signal id="A1" negated="ON"/><signal id="A0" negated="ON"/><signal id="MR_06_SPECSIG"/></pterm><pterm id="FB4_15_1"><signal id="A1"/><signal id="A0"/><signal id="XLXN_84_SPECSIG"/></pterm><pterm id="FB4_15_2"><signal id="A1"/><signal id="A0" negated="ON"/><signal id="MR_24_SPECSIG"/></pterm><pterm id="FB4_15_3"><signal id="A1" negated="ON"/><signal id="A0"/><signal id="MR_14_SPECSIG"/></pterm><pterm id="FB4_15_4"><signal id="A1" negated="ON"/><signal id="A0" negated="ON"/><signal id="MR_04_SPECSIG"/></pterm><pterm id="FB4_16_1"><signal id="A1"/><signal id="A0"/><signal id="XLXN_83FBKLFBK_SPECSIG"/></pterm><pterm id="FB4_16_2"><signal id="A1"/><signal id="A0" negated="ON"/><signal id="MR_23_SPECSIG"/></pterm><pterm id="FB4_16_3"><signal id="A1" negated="ON"/><signal id="A0"/><signal id="MR_13_SPECSIG"/></pterm><pterm id="FB4_16_4"><signal id="A1" negated="ON"/><signal id="A0" negated="ON"/><signal id="MR_03_SPECSIG"/></pterm><pterm id="FB4_17_1"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG"/><signal id="SEN0_OBUFFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB4_17_2"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG" negated="ON"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG" negated="ON"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="SEN0_OBUFFBKLFBK_SPECSIG"/></pterm><pterm id="FB4_17_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB4_17_4"><signal id="WR"/></pterm><pterm id="FB4_18_1"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG"/><signal id="D7PIN_SPECSIG"/><signal id="PC2ON_OBUFFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB4_18_2"><signal id="D1PIN_SPECSIG" negated="ON"/><signal id="D0PIN_SPECSIG" negated="ON"/><signal id="CS" negated="ON"/><signal id="A2" negated="ON"/><signal id="A1"/><signal id="A0" negated="ON"/><signal id="D4PIN_SPECSIG"/><signal id="D3PIN_SPECSIG" negated="ON"/><signal id="D2PIN_SPECSIG"/><signal id="D7PIN_SPECSIG" negated="ON"/><signal id="PC2ON_OBUFFBKLFBK_SPECSIG"/></pterm><pterm id="FB4_18_3"><signal id="RESET" negated="ON"/></pterm><pterm id="FB4_18_4"><signal id="WR"/></pterm><equation id="XLXI_57Q42XLXI_57Q4<2>_CLKF__INT_SPECSIG"><d2><eq_pterm ptindx="FB4_7_1"/></d2></equation><equation id="XLXN_83_SPECSIG" regUse="D"><d2><eq_pterm ptindx="GND"/></d2><clk><eq_pterm ptindx="GND"/></clk><set><eq_pterm ptindx="FB4_8_2"/></set><reset><eq_pterm ptindx="FB4_8_1"/></reset><prld ptindx="GND"/></equation><equation id="XLXN_82_SPECSIG" regUse="D"><d2><eq_pterm ptindx="GND"/></d2><clk><eq_pterm ptindx="GND"/></clk><set><eq_pterm ptindx="FB4_9_2"/></set><reset><eq_pterm ptindx="FB4_9_1"/></reset><prld ptindx="GND"/></equation><equation id="XLXI_57Q43_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_10_1"/><eq_pterm ptindx="FB4_10_2"/></d2><clk><eq_pterm ptindx="FB4_10_4"/></clk><reset><eq_pterm ptindx="FB4_10_3"/></reset><prld ptindx="GND"/></equation><equation id="XLXI_57Q42_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_11_1"/><eq_pterm ptindx="FB4_11_2"/></d2><clk><eq_pterm ptindx="FB4_11_4"/></clk><reset><eq_pterm ptindx="FB4_11_3"/></reset><prld ptindx="GND"/></equation><equation id="XLXI_57Q41_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_12_1"/><eq_pterm ptindx="FB4_12_2"/></d2><clk><eq_pterm ptindx="FB4_12_4"/></clk><reset><eq_pterm ptindx="FB4_12_3"/></reset><prld ptindx="GND"/></equation><equation id="XLXI_57Q40_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_13_1"/><eq_pterm ptindx="FB4_13_2"/></d2><clk><eq_pterm ptindx="FB4_13_4"/></clk><reset><eq_pterm ptindx="FB4_13_3"/></reset><prld ptindx="GND"/></equation><equation id="D6_BUFR_SPECSIG"><d2><eq_pterm ptindx="FB4_14_1"/><eq_pterm ptindx="FB4_14_2"/><eq_pterm ptindx="FB4_14_3"/><eq_pterm ptindx="FB4_14_4"/></d2></equation><equation id="D4_BUFR_SPECSIG"><d2><eq_pterm ptindx="FB4_15_1"/><eq_pterm ptindx="FB4_15_2"/><eq_pterm ptindx="FB4_15_3"/><eq_pterm ptindx="FB4_15_4"/></d2></equation><equation id="D3_BUFR_SPECSIG"><d2><eq_pterm ptindx="FB4_16_1"/><eq_pterm ptindx="FB4_16_2"/><eq_pterm ptindx="FB4_16_3"/><eq_pterm ptindx="FB4_16_4"/></d2></equation><equation id="SEN0" regUse="T"><d2><eq_pterm ptindx="FB4_17_1"/><eq_pterm ptindx="FB4_17_2"/></d2><clk><eq_pterm ptindx="FB4_17_4"/></clk><reset><eq_pterm ptindx="FB4_17_3"/></reset><prld ptindx="GND"/></equation><equation id="PC2ON" regUse="T"><d2><eq_pterm ptindx="FB4_18_1"/><eq_pterm ptindx="FB4_18_2"/></d2><clk><eq_pterm ptindx="FB4_18_4"/></clk><reset><eq_pterm ptindx="FB4_18_3"/></reset><prld ptindx="GND"/></equation></fblock><vcc/><gnd/><messages><warning>Cpld:897 - Unable to map all desired signals into function block, FB1. Buffering output signal D<7> to allow all signals assigned to this function block to be placed.</warning><warning>Cpld:897 - Unable to map all desired signals into function block, FB1. Buffering output signal D<6> to allow all signals assigned to this function block to be placed.</warning><warning>Cpld:897 - Unable to map all desired signals into function block, FB1. Buffering output signal D<5> to allow all signals assigned to this function block to be placed.</warning><warning>Cpld:897 - Unable to map all desired signals into function block, FB1. Buffering output signal D<4> to allow all signals assigned to this function block to be placed.</warning><warning>Cpld:897 - Unable to map all desired signals into function block, FB1. Buffering output signal D<3> to allow all signals assigned to this function block to be placed.</warning></messages><compOpts loc="ON" uim="ON" part="xc9572-10-TQ100" prld="LOW" slew="SLOW" mlopt="ON" power="AUTO" gsropt="OFF" gtsopt="OFF" inputs="36" keepio="OFF" pinfbk="ON" pterms="25" unused="OFF" exhaust="OFF" gclkopt="OFF" wysiwyg="OFF" ignorets="OFF" localfbk="ON" optimize="SPEED"/><specSig value="D<1>.PIN" signal="D1PIN_SPECSIG"/><specSig value="D<0>.PIN" signal="D0PIN_SPECSIG"/><specSig value="D<7>.PIN" signal="D7PIN_SPECSIG"/><specSig value="D<2>.PIN" signal="D2PIN_SPECSIG"/><specSig value="D<3>.PIN" signal="D3PIN_SPECSIG"/><specSig value="D<4>.PIN" signal="D4PIN_SPECSIG"/><specSig value="MR_0<0>" signal="MR_00_SPECSIG"/><specSig value="MR_2<0>" signal="MR_20_SPECSIG"/><specSig value="MR_1<0>" signal="MR_10_SPECSIG"/><specSig value="MR_1<1>" signal="MR_11_SPECSIG"/><specSig value="MR_0<1>" signal="MR_01_SPECSIG"/><specSig value="MR_2<1>" signal="MR_21_SPECSIG"/><specSig value="MR_0<2>" signal="MR_02_SPECSIG"/><specSig value="MR_2<2>" signal="MR_22_SPECSIG"/><specSig value="MR_1<2>" signal="MR_12_SPECSIG"/><specSig value="MR_0<3>" signal="MR_03_SPECSIG"/><specSig value="MR_2<3>" signal="MR_23_SPECSIG"/><specSig value="MR_1<3>" signal="MR_13_SPECSIG"/><specSig value="MR_0<4>" signal="MR_04_SPECSIG"/><specSig value="MR_2<4>" signal="MR_24_SPECSIG"/><specSig value="MR_1<4>" signal="MR_14_SPECSIG"/><specSig value="MR_0<5>" signal="MR_05_SPECSIG"/><specSig value="MR_2<5>" signal="MR_25_SPECSIG"/><specSig value="MR_1<5>" signal="MR_15_SPECSIG"/><specSig value="MR_0<6>" signal="MR_06_SPECSIG"/><specSig value="MR_2<6>" signal="MR_26_SPECSIG"/><specSig value="MR_1<6>" signal="MR_16_SPECSIG"/><specSig value="MR_0<7>" signal="MR_07_SPECSIG"/><specSig value="MR_2<7>" signal="MR_27_SPECSIG"/><specSig value="MR_1<7>" signal="MR_17_SPECSIG"/><specSig value="I/O" signal="IO_SPECSIG"/><specSig value="D<0>" signal="D0_SPECSIG"/><specSig value="D<1>" signal="D1_SPECSIG"/><specSig value="D<2>" signal="D2_SPECSIG"/><specSig value="D<3>" signal="D3_SPECSIG"/><specSig value="D<4>" signal="D⌨️ 快捷键说明
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