counter8.pnx

xilinx xc9572 cpld 实现的伺服电机控制器

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  arch   CDATA #REQUIRED
  device CDATA #REQUIRED
  spg    CDATA #REQUIRED
  pkg    CDATA #REQUIRED>
<!ATTLIST pin
  nm     CDATA #REQUIRED
  no     CDATA #REQUIRED
  iostd  (TTL|LVTTL|LVCMOS2|NA) "NA"
  sr     (SLOW|FAST|slow|fast) "SLOW"
  dir    (BIDIR|bidir|INPUT|input|OUTPUT|output) "BIDIR">
]>
<ibis><part pkg="TQ100" spg="-10" arch="xc9500" device="XC9572"/><pin nm="CCLK" no="95" dir="input"/><pin nm="CLR" no="56" dir="input"/><pin nm="L" no="64" dir="input"/><pin nm="Din&lt;0&gt;" no="90" dir="input"/><pin nm="CE" no="74" dir="input"/><pin nm="UP" no="11" dir="input"/><pin nm="Din&lt;10&gt;" no="89" dir="input"/><pin nm="Din&lt;11&gt;" no="32" dir="input"/><pin nm="Din&lt;1&gt;" no="14" dir="input"/><pin nm="Din&lt;2&gt;" no="28" dir="input"/><pin nm="Din&lt;3&gt;" no="35" dir="input"/><pin nm="Din&lt;4&gt;" no="67" dir="input"/><pin nm="Din&lt;5&gt;" no="12" dir="input"/><pin nm="Din&lt;6&gt;" no="78" dir="input"/><pin nm="Din&lt;7&gt;" no="52" dir="input"/><pin nm="Din&lt;8&gt;" no="42" dir="input"/><pin nm="Din&lt;9&gt;" no="13" dir="input"/><pin nm="Din&lt;12&gt;" no="29" dir="input"/><pin nm="Qout&lt;0&gt;" no="39" sr="slow" dir="output"/><pin nm="Qout&lt;10&gt;" no="49" sr="slow" dir="output"/><pin nm="Qout&lt;11&gt;" no="18" sr="slow" dir="output"/><pin nm="Qout&lt;1&gt;" no="33" sr="slow" dir="output"/><pin nm="Qout&lt;2&gt;" no="37" sr="slow" dir="output"/><pin nm="Qout&lt;3&gt;" no="71" sr="slow" dir="output"/><pin nm="Qout&lt;4&gt;" no="63" sr="slow" dir="output"/><pin nm="Qout&lt;5&gt;" no="68" sr="slow" dir="output"/><pin nm="Qout&lt;6&gt;" no="85" sr="slow" dir="output"/><pin nm="Qout&lt;7&gt;" no="91" sr="slow" dir="output"/><pin nm="Qout&lt;8&gt;" no="97" sr="slow" dir="output"/><pin nm="Qout&lt;9&gt;" no="9" sr="slow" dir="output"/><pin nm="Qout&lt;12&gt;" no="17" sr="slow" dir="output"/></ibis>