📄 ss7160.rpt
字号:
XACT: version C.22 Xilinx Inc.
Fitter Report
Design Name: ss7160
Fitting Status: Successful Date: 7-16-2001, 7:44PM
**************************** Resource Summary ****************************
Design Device Macrocells Product Terms Pins
Name Used Used Used Used
ss7160 XC95144-15-PQ160 112/144 ( 77%) 241/720 ( 33%) 93 /133 ( 69%)
PIN RESOURCES:
Signal Type Required Mapped | Pin Type Used Remaining
------------------------------------|---------------------------------------
Input : 39 39 | I/O : 86 39
Output : 38 38 | GCK/IO : 3 0
Bidirectional : 16 16 | GTS/IO : 3 1
GCK : 0 0 | GSR/IO : 1 0
GTS : 0 0 |
GSR : 0 0 |
---- ----
Total 93 93
GLOBAL RESOURCES:
Global clock net(s) unused.
Global output enable net(s) unused.
Global set/reset net(s) unused.
POWER DATA:
There are 112 macrocells in high performance mode (MCHP).
There are 0 macrocells in low power mode (MCLP).
There are a total of 112 macrocells used (MC).
End of Resource Summary
**************************** Errors and Warnings *************************
WARNING:nd300 - The signal(s) '&_AHLDA, &_BHLDA, &_DHLDA, &_CHLDA' are in
combinational feedback loops.
These signals may cause hazards/glitches. Logic should include hazard
reduction circuitry to avoid hazards/glitches. Apply the NOREDUCE parameter
to the hazard reduction circuitry.
***************Resources Used by Successfully Mapped Logic******************
** LOGIC **
Signal Total Signals Loc Pwr Slew Pin Pin Pin
Name Pt Used Mode Rate # Type Use
$OpTx$&_ACS/&_ACS_D2_INV$9__$INT 4 16 FB1_18 STD (b) (b)
$OpTx$&_BCS/&_BCS_D2_INV$10__$INT 4 16 FB1_15 STD 30 I/O I
$OpTx$&_CCS$Q_INV$157 4 16 FB1_14 STD 29 I/O I
$OpTx$&_DCS$Q_INV$158 4 16 FB4_12 STD 148 I/O I
AREAD 2 3 FB3_3 STD FAST 45 I/O I/O
AR_W 1 2 FB2_6 STD FAST 4 GTS/I/O O
BREAD 2 3 FB3_9 STD FAST 44 I/O I/O
BR_W 1 2 FB2_3 STD FAST 3 I/O O
CPUOE 1 1 FB3_14 STD FAST 54 I/O O
CREAD 2 3 FB1_16 STD FAST 39 I/O I/O
CR_W 1 2 FB2_1 STD FAST 158 I/O O
DREAD 2 3 FB1_13 STD FAST 38 I/O I/O
DR_W 1 2 FB4_17 STD FAST 156 I/O O
E_RW 1 1 FB8_2 STD FAST 101 I/O O
IORDY 0 0 FB8_8 STD FAST 104 I/O O
LCDLOCK 1 2 FB3_12 STD FAST 49 I/O O
LED0 2 2 FB5_1 STD FAST 65 I/O O
LED1 2 2 FB5_3 STD FAST 66 I/O O
LED2 2 2 FB5_4 STD FAST 67 I/O O
LED3 2 2 FB5_12 STD FAST 68 I/O O
MEM_CS 1 2 FB7_7 STD FAST 87 I/O O
N_ACS 4 16 FB1_9 STD FAST 24 I/O O
N_ADAS 2 3 FB1_17 STD FAST 33 GCK/I/O I/O
N_AHLDA 2 5 FB1_11 STD FAST 26 I/O I/O
N_AOE 1 2 FB2_5 STD FAST 2 GTS/I/O O
N_ARST 1 4 FB2_14 STD FAST 13 I/O O
N_ASCE 1 8 FB4_10 STD FAST 151 I/O O
N_BCS 4 16 FB1_8 STD FAST 23 I/O O
N_BDAS 2 3 FB1_7 STD FAST 32 I/O I/O
N_BHLDA 2 5 FB1_1 STD FAST 25 I/O I/O
N_BOE 1 2 FB2_2 STD FAST 159 GSR/I/O O
N_BRST 1 4 FB2_12 STD FAST 12 I/O O
N_BSCE 1 8 FB4_7 STD FAST 150 I/O O
N_CCS 4 16 FB1_3 STD FAST 19 I/O O
N_CDAS 2 3 FB3_2 STD FAST 35 GCK/I/O I/O
N_CHLDA 2 5 FB1_6 STD FAST 22 I/O I/O
N_COE 1 2 FB4_16 STD FAST 155 I/O O
N_CRST 1 4 FB2_17 STD FAST 17 I/O O
N_CSCE 1 8 FB4_13 STD FAST 153 I/O O
N_DCS 4 16 FB1_2 STD FAST 18 I/O O
N_DDAS 2 3 FB1_10 STD FAST 34 I/O I/O
N_DHLDA 2 5 FB1_5 STD FAST 21 I/O I/O
N_DOE 1 2 FB4_15 STD FAST 154 I/O O
N_DRST 1 4 FB2_16 STD FAST 16 I/O O
N_DSCE 1 8 FB4_14 STD FAST 152 I/O O
N_ESCE 1 5 FB7_17 STD FAST 98 I/O O
N_FACE 1 5 FB7_14 STD FAST 96 I/O O
N_TSA 1 10 FB2_8 STD FAST 6 GTS/I/O O
N_TSB 1 10 FB2_4 STD FAST 5 I/O O
N_TSC 1 10 FB2_15 STD FAST 15 I/O O
N_TSD 1 10 FB2_13 STD FAST 14 I/O O
RUN 2 2 FB5_11 STD FAST 64 I/O O
SD0 2 3 FB6_2 STD FAST 117 I/O I/O
SD0B$WA0 2 9 FB4_11 STD 146 I/O I
SD0B$WA1 5 15 FB4_18 STD (b) (b)
SD0B/SD0B_TRST 2 10 FB4_9 STD 145 I/O (b)
SD1 2 9 FB8_17 STD FAST 116 I/O I/O
SD2 2 9 FB8_15 STD FAST 115 I/O I/O
SD3 2 9 FB8_13 STD FAST 114 I/O I/O
SEM_CS 1 2 FB7_6 STD FAST 86 I/O O
S_OE 1 1 FB3_10 STD FAST 52 I/O O
U1/CSE_Q<0> 2 2 FB4_8 STD 144 I/O I
U1/CSE_Q<1> 2 2 FB5_13 STD 78 I/O I
U1/CSE_Q<2> 2 2 FB5_10 STD 76 I/O (b)
U1/CSE_Q<2>/U1/CSE_Q<2>_CLKF__$INT 1 9 FB4_6 STD 143 I/O I
U1/Q<0> 2 2 FB5_9 STD 63 I/O (b)
U1/Q<1> 2 2 FB5_8 STD 62 I/O I
U1/Q<2> 2 2 FB5_7 STD 74 I/O (b)
U1/Q<3> 2 2 FB5_6 STD 60 I/O (b)
U1/Q<3>/U1/Q<3>_CLKF__$INT 1 8 FB4_5 STD 142 I/O I
\$I37/AC2 2 3 FB8_5 STD 102 I/O (b)
\$I37/BC2 2 3 FB3_6 STD 37 I/O I
\$I37/CC2 2 3 FB6_18 STD (b) (b)
\$I37/DC2 2 3 FB7_4 STD 85 I/O I
\$I37/iACounter<0> 2 3 FB8_4 STD 107 I/O I
\$I37/iACounter<1> 3 4 FB8_18 STD (b) (b)
\$I37/iACounter<2> 3 5 FB8_16 STD 118 I/O I
\$I37/iACounter<3> 3 6 FB8_14 STD 113 I/O (b)
\$I37/iACounter<4> 3 7 FB8_12 STD 111 I/O I
\$I37/iACounter<5> 3 8 FB8_11 STD 108 I/O I
\$I37/iACounter<6> 3 9 FB8_10 STD 112 I/O I
\$I37/iACounter<7> 3 10 FB8_9 STD 106 I/O I
\$I37/iACounter<8> 3 11 FB8_7 STD 109 I/O I
\$I37/iBCounter<0> 2 3 FB3_5 STD 36 I/O I
\$I37/iBCounter<1> 3 4 FB3_18 STD (b) (b)
\$I37/iBCounter<2> 3 5 FB3_17 STD 57 I/O (b)
\$I37/iBCounter<3> 3 6 FB3_16 STD 55 I/O (b)
\$I37/iBCounter<4> 3 7 FB3_15 STD 56 I/O (b)
\$I37/iBCounter<5> 3 8 FB8_6 STD 103 I/O (b)
\$I37/iBCounter<6> 3 9 FB3_13 STD 53 I/O (b)
\$I37/iBCounter<7> 3 10 FB3_11 STD 47 I/O (b)
\$I37/iBCounter<8> 3 11 FB3_8 STD 42 GCK/I/O I
\$I37/iCCounter<0> 2 3 FB6_17 STD 139 I/O I
\$I37/iCCounter<1> 3 4 FB5_18 STD (b) (b)
\$I37/iCCounter<2> 3 5 FB5_17 STD 77 I/O (b)
\$I37/iCCounter<3> 3 6 FB5_16 STD 83 I/O (b)
\$I37/iCCounter<4> 3 7 FB5_15 STD 72 I/O (b)
\$I37/iCCounter<5> 3 8 FB5_14 STD 69 I/O (b)
\$I37/iCCounter<6> 3 9 FB7_18 STD (b) (b)
\$I37/iCCounter<7> 3 10 FB7_16 STD 93 I/O (b)
\$I37/iCCounter<8> 3 11 FB3_7 STD 50 I/O (b)
\$I37/iDCounter<0> 2 3 FB7_3 STD 84 I/O (b)
\$I37/iDCounter<1> 3 4 FB7_15 STD 97 I/O (b)
\$I37/iDCounter<2> 3 5 FB7_13 STD 91 I/O (b)
\$I37/iDCounter<3> 3 6 FB7_12 STD 95 I/O (b)
\$I37/iDCounter<4> 3 7 FB7_11 STD 92 I/O (b)
\$I37/iDCounter<5> 3 8 FB7_10 STD 89 I/O (b)
\$I37/iDCounter<6> 3 9 FB7_9 STD 90 I/O (b)
\$I37/iDCounter<7> 3 10 FB7_8 STD 88 I/O (b)
\$I37/iDCounter<8> 3 11 FB7_5 STD 82 I/O (b)
\$Net00040_/\$Net00040__CLKF__$INT 1 8 FB4_4 STD 149 I/O (b)
\$Net00041_/\$Net00041__CLKF__$INT 1 8 FB4_3 STD 147 I/O (b)
** INPUTS **
Signal Loc Pin Pin Pin
Name # Type Use
CPUA13 FB7_2 79 I/O I
CPUA14 FB5_8 62 I/O I
CPURD FB5_13 78 I/O I
CPUWR FB7_4 85 I/O I
N_AC4 FB4_6 143 I/O I
N_AF0 FB4_8 144 I/O I
N_AHOLD FB1_15 30 I/O I
N_AINT FB3_1 43 I/O I
N_BC4 FB6_15 138 I/O I
N_BF0 FB6_17 139 I/O I
N_BHOLD FB1_14 29 I/O I
N_BINT FB3_8 42 GCK/I/O I
N_CC4 FB4_11 146 I/O I
N_CF0 FB4_12 148 I/O I
N_CHOLD FB1_12 28 I/O I
N_CINT FB3_6 37 I/O I
N_DC4 FB4_2 140 I/O I
N_DF0 FB4_5 142 I/O I
N_DHOLD FB1_4 27 I/O I
N_DINT FB3_5 36 I/O I
N_SIOR FB8_11 108 I/O I
N_SIOW FB6_4 123 I/O I
SA1 FB6_11 133 I/O I
SA15 FB8_10 112 I/O I
SA16 FB8_12 111 I/O I
SA17 FB8_7 109 I/O I
SA18 FB8_4 107 I/O I
SA19 FB8_9 106 I/O I
SA2 FB4_1 132 I/O I
SA3 FB6_16 131 I/O I
SA4 FB6_13 130 I/O I
SA5 FB6_9 129 I/O I
SA6 FB6_10 128 I/O I
SA7 FB6_8 126 I/O I
SA8 FB6_7 125 I/O I
SA9 FB6_6 124 I/O I
SAEN FB8_3 105 I/O I
SMEMR FB6_3 119 I/O I
SMEMW FB8_16 118 I/O I
End of Resources Used by Successfully Mapped Logic
*********************Function Block Resource Summary***********************
Function # of FB Inputs Signals Total O/IO IO
Block Macrocells Used Used Pt Used Req Avail
FB1 16 26 26 46 4/9 17
FB2 13 17 50 13 13/0 17
FB3 16 32 32 37 3/3 17
FB4 16 32 32 26 7/0 17
FB5 16 16 16 37 5/0 17
FB6 3 7 7 6 0/1 16
FB7 16 29 29 38 4/0 16
FB8 16 32 32 38 2/3 16
---- ----- ----- -----
112 241 38/16 133
*********************************** FB1 ***********************************
Number of function block inputs used/remaining: 26/10
Number of signals used by logic mapping into function block: 26
Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -