ss7160.mod

该代码为配合7号信令模块MK50H27的cpld(xilinx 95144)的逻辑代码,其中包括了VHDL及原理图.

MODEL
MODEL_VERSION "v1998.8";
DESIGN "ss7160";

/* port names and type */
INPUT SA7;
INPUT SA6;
INPUT SA5;
INPUT SA4;
INPUT SA3;
INPUT SA9;
INPUT SA8;
INPUT SA17;
INPUT SA15;
INPUT SA19;
INPUT SA18;
INPUT SA16;
INPUT SA1;
INPUT SA2;
INPUT N_SIOR;
INPUT N_AHOLD;
INPUT N_SIOW;
INPUT N_BHOLD;
INPUT SAEN;
INPUT N_CHOLD;
INPUT N_DHOLD;
INPUT N_BINT;
INPUT N_DINT;
INPUT N_CINT;
INPUT N_AC4;
INPUT N_AF0;
INPUT N_BC4;
INPUT N_BF0;
INPUT N_CC4;
INPUT N_CF0;
INPUT N_DC4;
INPUT N_DF0;
INPUT SD2;
INPUT SD0;
INPUT SD1;
INPUT N_AINT;
INPUT SD3;
INPUT AREAD;
INPUT N_ADAS;
INPUT BREAD;
INPUT N_BDAS;
INPUT CREAD;
INPUT N_CDAS;
INPUT DREAD;
INPUT N_DDAS;
INPUT CPUA14;
INPUT CPUWR;
INPUT SMEMR;
INPUT CPUA13;
INPUT SMEMW;
INPUT CPURD;
INPUT N_AHLDA;
INPUT N_BHLDA;
INPUT N_CHLDA;
INPUT N_DHLDA;
TRIOUT SD2;
TRIOUT SD0;
TRIOUT SD1;
TRIOUT SD3;
TRIOUT AREAD;
TRIOUT N_ADAS;
TRIOUT BREAD;
TRIOUT N_BDAS;
TRIOUT CREAD;
TRIOUT N_CDAS;
TRIOUT DREAD;
TRIOUT N_DDAS;
OUTPUT N_AHLDA;
OUTPUT N_BHLDA;
OUTPUT N_CHLDA;
OUTPUT N_DHLDA;
OUTPUT N_TSA;
OUTPUT N_TSB;
OUTPUT N_TSC;
OUTPUT N_TSD;
OUTPUT N_ASCE;
OUTPUT N_BSCE;
OUTPUT N_CSCE;
OUTPUT N_DSCE;
OUTPUT N_ACS;
OUTPUT N_BCS;
OUTPUT N_ESCE;
OUTPUT N_DRST;
OUTPUT N_ARST;
OUTPUT N_BRST;
OUTPUT N_CRST;
OUTPUT LED3;
OUTPUT LED2;
OUTPUT LED1;
OUTPUT LED0;
OUTPUT RUN;
OUTPUT AR_W;
OUTPUT BR_W;
OUTPUT CR_W;
OUTPUT DR_W;
OUTPUT N_AOE;
OUTPUT N_BOE;
OUTPUT N_COE;
OUTPUT N_DOE;
OUTPUT LCDLOCK;
OUTPUT N_CCS;
OUTPUT N_DCS;
OUTPUT S_OE;
OUTPUT MEM_CS;
OUTPUT SEM_CS;
OUTPUT E_RW;
OUTPUT CPUOE;
OUTPUT N_FACE;
OUTPUT IORDY;

/* timing arc definitions */
N_CINT_SD2_delay: DELAY (ENABLE_HIGH) N_CINT SD2;
SA7_SD2_delay: DELAY SA7 SD2;
SA6_SD2_delay: DELAY SA6 SD2;
SA5_SD2_delay: DELAY SA5 SD2;
SA4_SD2_delay: DELAY SA4 SD2;
SA9_SD2_delay: DELAY SA9 SD2;
SA8_SD2_delay: DELAY SA8 SD2;
N_SIOR_SD2_delay: DELAY N_SIOR SD2;
SAEN_SD2_delay: DELAY SAEN SD2;
N_CHOLD_SD0_delay: DELAY (ENABLE_HIGH) N_CHOLD SD0;
N_CHLDA_SD0_delay: DELAY (ENABLE_HIGH) N_CHLDA SD0;
N_AHOLD_SD0_delay: DELAY (ENABLE_HIGH) N_AHOLD SD0;
N_AHLDA_SD0_delay: DELAY (ENABLE_HIGH) N_AHLDA SD0;
N_DHOLD_SD0_delay: DELAY (ENABLE_HIGH) N_DHOLD SD0;
N_DHLDA_SD0_delay: DELAY (ENABLE_HIGH) N_DHLDA SD0;
N_BHOLD_SD0_delay: DELAY (ENABLE_HIGH) N_BHOLD SD0;
N_BHLDA_SD0_delay: DELAY (ENABLE_HIGH) N_BHLDA SD0;
N_AINT_SD0_delay: DELAY (ENABLE_HIGH) N_AINT SD0;
N_SIOR_SD0_delay: DELAY N_SIOR SD0;
N_BINT_SD1_delay: DELAY (ENABLE_HIGH) N_BINT SD1;
SA7_SD1_delay: DELAY SA7 SD1;
SA6_SD1_delay: DELAY SA6 SD1;
SA5_SD1_delay: DELAY SA5 SD1;
SA4_SD1_delay: DELAY SA4 SD1;
SA9_SD1_delay: DELAY SA9 SD1;
SA8_SD1_delay: DELAY SA8 SD1;
N_SIOR_SD1_delay: DELAY N_SIOR SD1;
SAEN_SD1_delay: DELAY SAEN SD1;
N_DINT_SD3_delay: DELAY (ENABLE_HIGH) N_DINT SD3;
SA7_SD3_delay: DELAY SA7 SD3;
SA6_SD3_delay: DELAY SA6 SD3;
SA5_SD3_delay: DELAY SA5 SD3;
SA4_SD3_delay: DELAY SA4 SD3;
SA9_SD3_delay: DELAY SA9 SD3;
SA8_SD3_delay: DELAY SA8 SD3;
N_SIOR_SD3_delay: DELAY N_SIOR SD3;
SAEN_SD3_delay: DELAY SAEN SD3;
N_SIOR_AREAD_delay: DELAY N_SIOR AREAD;
SA1_AREAD_delay: DELAY SA1 AREAD;
SA2_AREAD_delay: DELAY SA2 AREAD;
N_AHOLD_AREAD_delay: DELAY N_AHOLD AREAD;
N_SIOR_N_ADAS_delay: DELAY N_SIOR N_ADAS;
SA1_N_ADAS_delay: DELAY SA1 N_ADAS;
SA2_N_ADAS_delay: DELAY SA2 N_ADAS;
N_AHOLD_N_ADAS_delay: DELAY N_AHOLD N_ADAS;
N_SIOR_BREAD_delay: DELAY N_SIOR BREAD;
SA1_BREAD_delay: DELAY SA1 BREAD;
SA2_BREAD_delay: DELAY SA2 BREAD;
N_BHOLD_BREAD_delay: DELAY N_BHOLD BREAD;
N_SIOR_N_BDAS_delay: DELAY N_SIOR N_BDAS;
SA1_N_BDAS_delay: DELAY SA1 N_BDAS;
SA2_N_BDAS_delay: DELAY SA2 N_BDAS;
N_BHOLD_N_BDAS_delay: DELAY N_BHOLD N_BDAS;
N_SIOR_CREAD_delay: DELAY N_SIOR CREAD;
SA1_CREAD_delay: DELAY SA1 CREAD;
SA2_CREAD_delay: DELAY SA2 CREAD;
N_CHOLD_CREAD_delay: DELAY N_CHOLD CREAD;
N_SIOR_N_CDAS_delay: DELAY N_SIOR N_CDAS;
SA1_N_CDAS_delay: DELAY SA1 N_CDAS;
SA2_N_CDAS_delay: DELAY SA2 N_CDAS;
N_CHOLD_N_CDAS_delay: DELAY N_CHOLD N_CDAS;
N_SIOR_DREAD_delay: DELAY N_SIOR DREAD;
SA1_DREAD_delay: DELAY SA1 DREAD;
SA2_DREAD_delay: DELAY SA2 DREAD;
N_DHOLD_DREAD_delay: DELAY N_DHOLD DREAD;
N_DHLDA_DREAD_delay: DELAY N_DHLDA DREAD;
N_SIOR_N_DDAS_delay: DELAY N_SIOR N_DDAS;
SA1_N_DDAS_delay: DELAY SA1 N_DDAS;
SA2_N_DDAS_delay: DELAY SA2 N_DDAS;
N_DHOLD_N_DDAS_delay: DELAY N_DHOLD N_DDAS;
N_DHLDA_N_DDAS_delay: DELAY N_DHLDA N_DDAS;
N_AHOLD_N_AHLDA_delay: DELAY N_AHOLD N_AHLDA;
N_BHOLD_N_BHLDA_delay: DELAY N_BHOLD N_BHLDA;
N_CHOLD_N_CHLDA_delay: DELAY N_CHOLD N_CHLDA;
N_DHOLD_N_DHLDA_delay: DELAY N_DHOLD N_DHLDA;
SA17_N_ASCE_delay: DELAY SA17 N_ASCE;
SA15_N_ASCE_delay: DELAY SA15 N_ASCE;
SA19_N_ASCE_delay: DELAY SA19 N_ASCE;
SA18_N_ASCE_delay: DELAY SA18 N_ASCE;
SA16_N_ASCE_delay: DELAY SA16 N_ASCE;
SA17_N_BSCE_delay: DELAY SA17 N_BSCE;
SA15_N_BSCE_delay: DELAY SA15 N_BSCE;
SA19_N_BSCE_delay: DELAY SA19 N_BSCE;
SA18_N_BSCE_delay: DELAY SA18 N_BSCE;
SA16_N_BSCE_delay: DELAY SA16 N_BSCE;
SA17_N_CSCE_delay: DELAY SA17 N_CSCE;
SA15_N_CSCE_delay: DELAY SA15 N_CSCE;
SA19_N_CSCE_delay: DELAY SA19 N_CSCE;
SA18_N_CSCE_delay: DELAY SA18 N_CSCE;
SA16_N_CSCE_delay: DELAY SA16 N_CSCE;
SA17_N_DSCE_delay: DELAY SA17 N_DSCE;
SA15_N_DSCE_delay: DELAY SA15 N_DSCE;
SA19_N_DSCE_delay: DELAY SA19 N_DSCE;
SA18_N_DSCE_delay: DELAY SA18 N_DSCE;
SA16_N_DSCE_delay: DELAY SA16 N_DSCE;
SA1_N_ACS_delay: DELAY SA1 N_ACS;
SA2_N_ACS_delay: DELAY SA2 N_ACS;
N_SIOR_N_ACS_delay: DELAY N_SIOR N_ACS;
N_AHOLD_N_ACS_delay: DELAY N_AHOLD N_ACS;
SA1_N_BCS_delay: DELAY SA1 N_BCS;
SA2_N_BCS_delay: DELAY SA2 N_BCS;
N_SIOR_N_BCS_delay: DELAY N_SIOR N_BCS;
N_BHOLD_N_BCS_delay: DELAY N_BHOLD N_BCS;
SA17_N_ESCE_delay: DELAY SA17 N_ESCE;
SA15_N_ESCE_delay: DELAY SA15 N_ESCE;
SA19_N_ESCE_delay: DELAY SA19 N_ESCE;
SA18_N_ESCE_delay: DELAY SA18 N_ESCE;
SA16_N_ESCE_delay: DELAY SA16 N_ESCE;
AREAD_AR_W_delay: DELAY AREAD AR_W;
N_ADAS_AR_W_delay: DELAY N_ADAS AR_W;
BREAD_BR_W_delay: DELAY BREAD BR_W;
N_BDAS_BR_W_delay: DELAY N_BDAS BR_W;
CREAD_CR_W_delay: DELAY CREAD CR_W;
N_CDAS_CR_W_delay: DELAY N_CDAS CR_W;
DREAD_DR_W_delay: DELAY DREAD DR_W;
N_DDAS_DR_W_delay: DELAY N_DDAS DR_W;
AREAD_N_AOE_delay: DELAY AREAD N_AOE;
N_ADAS_N_AOE_delay: DELAY N_ADAS N_AOE;
BREAD_N_BOE_delay: DELAY BREAD N_BOE;
N_BDAS_N_BOE_delay: DELAY N_BDAS N_BOE;
CREAD_N_COE_delay: DELAY CREAD N_COE;
N_CDAS_N_COE_delay: DELAY N_CDAS N_COE;
DREAD_N_DOE_delay: DELAY DREAD N_DOE;
N_DDAS_N_DOE_delay: DELAY N_DDAS N_DOE;
CPUA14_LCDLOCK_delay: DELAY CPUA14 LCDLOCK;
CPUWR_LCDLOCK_delay: DELAY CPUWR LCDLOCK;
SA1_N_CCS_delay: DELAY SA1 N_CCS;
SA2_N_CCS_delay: DELAY SA2 N_CCS;
N_SIOR_N_CCS_delay: DELAY N_SIOR N_CCS;
N_CHOLD_N_CCS_delay: DELAY N_CHOLD N_CCS;
SA1_N_DCS_delay: DELAY SA1 N_DCS;
SA2_N_DCS_delay: DELAY SA2 N_DCS;
N_SIOR_N_DCS_delay: DELAY N_SIOR N_DCS;
N_DHOLD_N_DCS_delay: DELAY N_DHOLD N_DCS;
SMEMR_S_OE_delay: DELAY SMEMR S_OE;
CPUA14_MEM_CS_delay: DELAY CPUA14 MEM_CS;
CPUA13_MEM_CS_delay: DELAY CPUA13 MEM_CS;
CPUA14_SEM_CS_delay: DELAY CPUA14 SEM_CS;
CPUA13_SEM_CS_delay: DELAY CPUA13 SEM_CS;
SMEMW_E_RW_delay: DELAY SMEMW E_RW;
CPURD_CPUOE_delay: DELAY CPURD CPUOE;
SA17_N_FACE_delay: DELAY SA17 N_FACE;
SA15_N_FACE_delay: DELAY SA15 N_FACE;
SA19_N_FACE_delay: DELAY SA19 N_FACE;
SA18_N_FACE_delay: DELAY SA18 N_FACE;
SA16_N_FACE_delay: DELAY SA16 N_FACE;
SAEN_SD0_delay: DELAY SAEN SD0;
SAEN_AREAD_delay: DELAY (ENABLE_HIGH) SAEN AREAD;
SAEN_N_ADAS_delay: DELAY (ENABLE_HIGH) SAEN N_ADAS;
SAEN_BREAD_delay: DELAY (ENABLE_HIGH) SAEN BREAD;
SAEN_N_BDAS_delay: DELAY (ENABLE_HIGH) SAEN N_BDAS;
SAEN_CREAD_delay: DELAY (ENABLE_HIGH) SAEN CREAD;
SAEN_N_CDAS_delay: DELAY (ENABLE_HIGH) SAEN N_CDAS;
SAEN_DREAD_delay: DELAY (ENABLE_HIGH) SAEN DREAD;
SAEN_N_DDAS_delay: DELAY (ENABLE_HIGH) SAEN N_DDAS;
SAEN_N_AHLDA_delay: DELAY SAEN N_AHLDA;
SAEN_N_BHLDA_delay: DELAY SAEN N_BHLDA;
SAEN_N_CHLDA_delay: DELAY SAEN N_CHLDA;
SAEN_N_DHLDA_delay: DELAY SAEN N_DHLDA;
SAEN_N_ASCE_delay: DELAY SAEN N_ASCE;
SAEN_N_BSCE_delay: DELAY SAEN N_BSCE;
SAEN_N_CSCE_delay: DELAY SAEN N_CSCE;
SAEN_N_DSCE_delay: DELAY SAEN N_DSCE;
SAEN_N_ACS_delay: DELAY SAEN N_ACS;
SAEN_N_BCS_delay: DELAY SAEN N_BCS;
SAEN_N_DRST_delay: DELAY SAEN N_DRST;
SAEN_N_ARST_delay: DELAY SAEN N_ARST;
SAEN_N_BRST_delay: DELAY SAEN N_BRST;
SAEN_N_CRST_delay: DELAY SAEN N_CRST;
SAEN_LED3_delay: DELAY SAEN LED3;
SAEN_LED2_delay: DELAY SAEN LED2;
SAEN_LED1_delay: DELAY SAEN LED1;
SAEN_LED0_delay: DELAY SAEN LED0;
SAEN_RUN_delay: DELAY SAEN RUN;
SAEN_N_CCS_delay: DELAY SAEN N_CCS;
SAEN_N_DCS_delay: DELAY SAEN N_DCS;
N_SIOW_SD0_delay: DELAY (ENABLE_HIGH) N_SIOW SD0;
N_SIOW_AREAD_delay: DELAY N_SIOW AREAD;
N_SIOW_N_ADAS_delay: DELAY N_SIOW N_ADAS;
N_SIOW_BREAD_delay: DELAY N_SIOW BREAD;
N_SIOW_N_BDAS_delay: DELAY N_SIOW N_BDAS;
N_SIOW_CREAD_delay: DELAY N_SIOW CREAD;
N_SIOW_N_CDAS_delay: DELAY N_SIOW N_CDAS;
N_SIOW_DREAD_delay: DELAY N_SIOW DREAD;
N_SIOW_N_DDAS_delay: DELAY N_SIOW N_DDAS;
N_SIOW_N_AHLDA_delay: DELAY N_SIOW N_AHLDA;
N_SIOW_N_BHLDA_delay: DELAY N_SIOW N_BHLDA;
N_SIOW_N_CHLDA_delay: DELAY N_SIOW N_CHLDA;
N_SIOW_N_DHLDA_delay: DELAY N_SIOW N_DHLDA;