devider.bld

本人编写的定点除法器,开发软件为XILINX的ISE6.2,通过PAR仿真.

Release 6.2.01i - ngdbuild G.29
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.

Command Line: ngdbuild -intstyle ise -dd d:\fpga\仿真\divider_定点除法器/_ngo -i
-p xc2s200-pq208-5 devider.ngc devider.ngd 

Reading NGO file "D:/FPGA/仿真/Divider_定点除法器/devider.ngc" ...
Reading component libraries for design expansion...

Checking timing specifications ...
Checking expanded design ...

NGDBUILD Design Results Summary:
  Number of errors:     0
  Number of warnings:   0

Total memory usage is 39140 kilobytes

Writing NGD file "devider.ngd" ...

Writing NGDBUILD log file "devider.bld"...